uint8 SuperFX::mmio_read(unsigned addr) { if(!Memory::debugger_access()) cpu.synchronize_coprocessor(); if(addr >= 0x3100 && addr <= 0x32ff) { return cache_mmio_read(addr - 0x3100); } if(addr >= 0x3000 && addr <= 0x301f) { return regs.r[(addr >> 1) & 15] >> ((addr & 1) << 3); } switch(addr) { case 0x3030: { return regs.sfr >> 0; } case 0x3031: { uint8 r = regs.sfr >> 8; if(!Memory::debugger_access()) { regs.sfr.irq = 0; cpu.regs.irq = 0; } return r; } case 0x3034: { return regs.pbr; } case 0x3036: { return regs.rombr; } case 0x303b: { return regs.vcr; } case 0x303c: { return regs.rambr; } case 0x303e: { return regs.cbr >> 0; } case 0x303f: { return regs.cbr >> 8; } } return 0x00; }
uint8 SuperFX::mmio_read(unsigned addr) { scheduler.sync_cpucop(); addr &= 0xffff; if(addr >= 0x3100 && addr <= 0x32ff) { return cache_mmio_read(addr - 0x3100); } if(addr >= 0x3000 && addr <= 0x301f) { return regs.r[(addr >> 1) & 15] >> ((addr & 1) << 3); } switch(addr) { case 0x3030: { return regs.sfr >> 0; } case 0x3031: { uint8 r = regs.sfr >> 8; regs.sfr.irq = 0; cpu.regs.irq = 0; return r; } case 0x3034: { return regs.pbr; } case 0x3036: { return regs.rombr; } case 0x303b: { return regs.vcr; } case 0x303c: { return regs.rambr; } case 0x303e: { return regs.cbr >> 0; } case 0x303f: { return regs.cbr >> 8; } } return 0x00; }