/*
* This function set up the main chip clock.
*
* Input: Frequency to be set.
*/
static void setChipClock(unsigned int frequency)
{
pll_value_t pll;
unsigned int ulActualMxClk;
/* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */
if (getChipType() == SM750LE)
return;
if (frequency) {
/*
* Set up PLL, a structure to hold the value to be set in clocks.
*/
pll.inputFreq = DEFAULT_INPUT_CLOCK; /* Defined in CLOCK.H */
pll.clockType = MXCLK_PLL;
/*
* Call calcPllValue() to fill up the other fields for PLL structure.
* Sometime, the chip cannot set up the exact clock required by User.
* Return value from calcPllValue() gives the actual possible clock.
*/
ulActualMxClk = calcPllValue(frequency, &pll);
/* Master Clock Control: MXCLK_PLL */
POKE32(MXCLK_PLL_CTRL, formatPllReg(&pll));
}
}
int ddk750_setModeTiming(mode_parameter_t *parm, clock_type_t clock)
{
pll_value_t pll;
unsigned int uiActualPixelClk;
pll.inputFreq = DEFAULT_INPUT_CLOCK;
pll.clockType = clock;
uiActualPixelClk = calcPllValue(parm->pixel_clock, &pll);
if (getChipType() == SM750LE) {
/* set graphic mode via IO method */
outb_p(0x88, 0x3d4);
outb_p(0x06, 0x3d5);
}
programModeRegisters(parm, &pll);
return 0;
}
