/* Configure chregs according to cfg, where cfg->tube_dst is peripheral. */
static int config_to_per(dma_tube_reg_map *chregs, dma_tube_config *cfg) {
/* Check that ->tube_src is memory (if it's anything else, we
* shouldn't have been called). */
ASSERT(_dma_addr_type(cfg->tube_src) == DMA_ATYPE_MEM);
set_ccr(chregs,
cfg->tube_src_size, cfg->tube_flags & DMA_CFG_SRC_INC,
cfg->tube_dst_size, cfg->tube_flags & DMA_CFG_DST_INC,
(cfg_ccr_flags(cfg->tube_flags) | DMA_CCR_DIR_FROM_MEM));
chregs->CMAR = (uint32)cfg->tube_src;
chregs->CPAR = (uint32)cfg->tube_dst;
return DMA_TUBE_CFG_SUCCESS;
}
/* Configure chregs according to cfg, where cfg->tube_dst is memory. */
static int config_to_mem(dma_tube_reg_map *chregs, dma_tube_config *cfg) {
uint32 mem2mem;
if ((_dma_addr_type(cfg->tube_src) == DMA_ATYPE_MEM) &&
(cfg->tube_flags & DMA_CFG_CIRC)) {
/* Can't do mem-to-mem and circular mode */
return -DMA_TUBE_CFG_ECFG;
}
mem2mem = (_dma_addr_type(cfg->tube_src) == DMA_ATYPE_MEM ?
DMA_CCR_MEM2MEM : 0);
set_ccr(chregs,
cfg->tube_dst_size, cfg->tube_flags & DMA_CFG_DST_INC,
cfg->tube_src_size, cfg->tube_flags & DMA_CFG_SRC_INC,
(cfg_ccr_flags(cfg->tube_flags) |
DMA_CCR_DIR_FROM_PER |
mem2mem));
chregs->CNDTR = cfg->tube_nr_xfers;
chregs->CMAR = (uint32)cfg->tube_dst;
chregs->CPAR = (uint32)cfg->tube_src;
return DMA_TUBE_CFG_SUCCESS;
}
