void dmacHw_initDma(void) { uint32_t i = 0; dmaChannelCount_0 = dmacHw_GET_NUM_CHANNEL(0); dmaChannelCount_1 = dmacHw_GET_NUM_CHANNEL(1); chipcHw_busInterfaceClockEnable(chipcHw_REG_BUS_CLOCK_DMAC0); chipcHw_busInterfaceClockEnable(chipcHw_REG_BUS_CLOCK_DMAC1); if ((dmaChannelCount_0 + dmaChannelCount_1) > dmacHw_MAX_CHANNEL_COUNT) { dmacHw_ASSERT(0); } memset((void *)dmacHw_gCblk, 0, sizeof(dmacHw_CBLK_t) * (dmaChannelCount_0 + dmaChannelCount_1)); for (i = 0; i < dmaChannelCount_0; i++) { dmacHw_gCblk[i].module = 0; dmacHw_gCblk[i].channel = i; } for (i = 0; i < dmaChannelCount_1; i++) { dmacHw_gCblk[i + dmaChannelCount_0].module = 1; dmacHw_gCblk[i + dmaChannelCount_0].channel = i; } }
void __init bcmring_amba_init(void) { int i; u32 bus_clock; /* Linux is run initially in non-secure mode. Secure peripherals */ /* generate FIQ, and must be handled in secure mode. Until we have */ /* a linux security monitor implementation, keep everything in */ /* non-secure mode. */ chipcHw_busInterfaceClockEnable(chipcHw_REG_BUS_CLOCK_SPU); secHw_setUnsecure(secHw_BLK_MASK_CHIP_CONTROL | secHw_BLK_MASK_KEY_SCAN | secHw_BLK_MASK_TOUCH_SCREEN | secHw_BLK_MASK_UART0 | secHw_BLK_MASK_UART1 | secHw_BLK_MASK_WATCHDOG | secHw_BLK_MASK_SPUM | secHw_BLK_MASK_DDR2 | secHw_BLK_MASK_SPU | secHw_BLK_MASK_PKA | secHw_BLK_MASK_RNG | secHw_BLK_MASK_RTC | secHw_BLK_MASK_OTP | secHw_BLK_MASK_BOOT | secHw_BLK_MASK_MPU | secHw_BLK_MASK_TZCTRL | secHw_BLK_MASK_INTR); /* Only the devices attached to the AMBA bus are enabled just before the bus is */ /* scanned and the drivers are loaded. The clocks need to be on for the AMBA bus */ /* driver to access these blocks. The bus is probed, and the drivers are loaded. */ /* FIXME Need to remove enable of PIF once CLCD clock enable used properly in FPGA. */ bus_clock = chipcHw_REG_BUS_CLOCK_GE | chipcHw_REG_BUS_CLOCK_SDIO0 | chipcHw_REG_BUS_CLOCK_SDIO1; chipcHw_busInterfaceClockEnable(bus_clock); for (i = 0; i < ARRAY_SIZE(lookups); i++) clkdev_add(&lookups[i]); for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { struct amba_device *d = amba_devs[i]; amba_device_register(d, &iomem_resource); } }
void __init bcmring_amba_init(void) { int i; u32 bus_clock; chipcHw_busInterfaceClockEnable(chipcHw_REG_BUS_CLOCK_SPU); secHw_setUnsecure(secHw_BLK_MASK_CHIP_CONTROL | secHw_BLK_MASK_KEY_SCAN | secHw_BLK_MASK_TOUCH_SCREEN | secHw_BLK_MASK_UART0 | secHw_BLK_MASK_UART1 | secHw_BLK_MASK_WATCHDOG | secHw_BLK_MASK_SPUM | secHw_BLK_MASK_DDR2 | secHw_BLK_MASK_SPU | secHw_BLK_MASK_PKA | secHw_BLK_MASK_RNG | secHw_BLK_MASK_RTC | secHw_BLK_MASK_OTP | secHw_BLK_MASK_BOOT | secHw_BLK_MASK_MPU | secHw_BLK_MASK_TZCTRL | secHw_BLK_MASK_INTR); bus_clock = chipcHw_REG_BUS_CLOCK_GE | chipcHw_REG_BUS_CLOCK_SDIO0 | chipcHw_REG_BUS_CLOCK_SDIO1; chipcHw_busInterfaceClockEnable(bus_clock); for (i = 0; i < ARRAY_SIZE(lookups); i++) clkdev_add(&lookups[i]); for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { struct amba_device *d = amba_devs[i]; amba_device_register(d, &iomem_resource); } }