示例#1
0
static int dma_dwc_xfer_setup(struct scatterlist *sg, int num_elems,
			      struct lli *lli, dma_addr_t dma_lli,
			      void __iomem *addr, int dir)
{
	int dma_ch;
	int num_lli;
	/* Acquire DMA channel */
	dma_ch = dma_request_channel();
	if (dma_ch == -1) {
		dev_err(host_pvt.dwc_dev, "%s: dma channel unavailable\n",
			 __func__);
		return -EAGAIN;
	}

	/* Convert SG list to linked list of items (LLIs) for AHB DMA */
	num_lli = map_sg_to_lli(sg, num_elems, lli, dma_lli, addr, dir);

	dev_dbg(host_pvt.dwc_dev, "%s sg: 0x%p, count: %d lli: %p dma_lli:"
		" 0x%0xlx addr: %p lli count: %d\n", __func__, sg, num_elems,
		 lli, (u32)dma_lli, addr, num_lli);

	clear_chan_interrupts(dma_ch);

	/* Program the CFG register. */
	out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].cfg.high),
		 DMA_CFG_HW_HS_SRC(dma_ch) | DMA_CFG_HW_HS_DEST(dma_ch) |
		 DMA_CFG_PROTCTL | DMA_CFG_FCMOD_REQ);
	out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].cfg.low),
		 DMA_CFG_HW_CH_PRIOR(dma_ch));

	/* Program the address of the linked list */
	out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].llp.low),
		 DMA_LLP_LMS(dma_lli, DMA_LLP_AHBMASTER2));

	/* Program the CTL register with src enable / dst enable */
	out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].ctl.low),
		 DMA_CTL_LLP_SRCEN | DMA_CTL_LLP_DSTEN);
	return dma_ch;
}
static int dma_dwc_xfer_setup(struct scatterlist *sg, int num_elems,
                              struct lli *lli, dma_addr_t dma_lli,
                              void __iomem *addr, int dir)
{
    int dma_ch;
    int num_lli;

    dma_ch = dma_request_channel();
    if (dma_ch == -1) {
        dev_err(host_pvt.dwc_dev, "%s: dma channel unavailable\n",
                __func__);
        return -EAGAIN;
    }


    num_lli = map_sg_to_lli(sg, num_elems, lli, dma_lli, addr, dir);

    dev_dbg(host_pvt.dwc_dev, "%s sg: 0x%p, count: %d lli: %p dma_lli:"
            " 0x%0xlx addr: %p lli count: %d\n", __func__, sg, num_elems,
            lli, (u32)dma_lli, addr, num_lli);

    clear_chan_interrupts(dma_ch);


    out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].cfg.high),
             DMA_CFG_PROTCTL | DMA_CFG_FCMOD_REQ);
    out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].cfg.low), 0);


    out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].llp.low),
             DMA_LLP_LMS(dma_lli, DMA_LLP_AHBMASTER2));


    out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].ctl.low),
             DMA_CTL_LLP_SRCEN | DMA_CTL_LLP_DSTEN);
    return dma_ch;
}