int VerifSuite_CppAssertComp_1_t::clock ( dat_t<1> reset ) {
uint32_t min = ((uint32_t)1<<31)-1;
if (clk_cnt < min) min = clk_cnt;
clk_cnt-=min;
if (clk_cnt == 0) clock_lo( reset );
if (clk_cnt == 0) clock_hi( reset );
if (clk_cnt == 0) clk_cnt = clk;
return min;
}
int WB_Led_Dev_t::clock ( dat_t<1> reset ) {
uint32_t min = ((uint32_t)1<<31)-1;
if (clk_cnt < min) min = clk_cnt;
clk_cnt-=min;
if (clk_cnt == 0) clock_hi( reset );
if (clk_cnt == 0) clock_lo( reset );
if (clk_cnt == 0) clk_cnt = clk;
return min;
}
int DelaySuite_ROMModule_1_t::clock ( dat_t<1> reset ) {
uint32_t min = ((uint32_t)1<<31)-1;
if (clk_cnt < min) min = clk_cnt;
clk_cnt-=min;
if (clk_cnt == 0) clock_hi( reset );
if (clk_cnt == 0) clock_lo( reset );
if (clk_cnt == 0) clk_cnt = clk;
return min;
}
int NameSuite_DebugComp_1_t::clock ( dat_t<1> reset ) {
uint32_t min = ((uint32_t)1<<31)-1;
if (clk.cnt < min) min = clk.cnt;
clk.cnt-=min;
if (clk.cnt == 0) clock_lo( reset );
if (clk.cnt == 0) clock_hi( reset );
if (clk.cnt == 0) clk.cnt = clk.len;
return min;
}
int Regsiter_File_t::clock ( dat_t<1> reset ) {
uint32_t min = ((uint32_t)1<<31)-1;
if (clk_cnt < min) min = clk_cnt;
clk_cnt-=min;
if (clk_cnt == 0) clock_hi( reset );
if (clk_cnt == 0) clock_lo( reset );
if (clk_cnt == 0) clk_cnt = clk;
return min;
}
int WhenSuite_SwitchClassComp_1_t::clock ( dat_t<1> reset ) {
uint32_t min = ((uint32_t)1<<31)-1;
if (clk_cnt < min) min = clk_cnt;
clk_cnt-=min;
if (clk_cnt == 0) clock_lo( reset );
if (clk_cnt == 0) clock_hi( reset );
if (clk_cnt == 0) clk_cnt = clk;
return min;
}
int VerifSuite_CppPrintfComp_1_t::clock ( dat_t<1> reset ) {
uint32_t min = ((uint32_t)1<<31)-1;
if (clk.cnt < min) min = clk.cnt;
clk.cnt-=min;
if (clk.cnt == 0) clock_lo( reset );
if (!reset.to_bool()) print( std::cerr );
if (clk.cnt == 0) clock_hi( reset );
if (clk.cnt == 0) clk.cnt = clk.len;
return min;
}
int NameSuite_DebugComp_1_t::clock ( dat_t<1> reset ) {
uint32_t min = ((uint32_t)1<<31)-1;
if (clk.cnt < min) min = clk.cnt;
clk.cnt-=min;
if (clk.cnt == 0) clock_lo( reset );
if (!reset.to_bool()) print( std::cerr );
mod_t::dump( reset );
if (clk.cnt == 0) clock_hi( reset );
if (clk.cnt == 0) clk.cnt = clk.len;
return min;
}
/*
Host to Keyboard
----------------
Data bits are LSB first and Parity is odd. Clock has around 60us high and 30us low part.
____ __ __ __ __ __ __ __ __ __ ________
Clock \______/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
^ ____ ____ ____ ____ ____ ____ ____ ____ ____ ____ ___
Data ____|__/ X____X____X____X____X____X____X____X____X____X \___
| Start 0 1 2 3 4 5 6 7 P Stop
Request by host
Start bit: can be long as 300-350us.
Request: Host pulls Clock line down to request to send a command.
Timing: After Request keyboard pull up Data and down Clock line to low for start bit.
After request host release Clock line once Data line becomes hi.
Host writes a bit while Clock is hi and Keyboard reads while low.
Stop bit: Host releases or pulls up Data line to hi after 9th clock and waits for keyboard pull down the line to lo.
*/
uint8_t ibm4704_send(uint8_t data)
{
bool parity = true; // odd parity
ibm4704_error = 0;
IBM4704_INT_OFF();
/* Request to send */
idle();
clock_lo();
/* wait for Start bit(Clock:lo/Data:hi) */
WAIT(data_hi, 300, 0x30);
/* Data bit */
for (uint8_t i = 0; i < 8; i++) {
WAIT(clock_hi, 100, 0x40+i);
if (data&(1<<i)) {
parity = !parity;
data_hi();
} else {
data_lo();
}
WAIT(clock_lo, 100, 0x48+i);
}
/* Parity bit */
WAIT(clock_hi, 100, 0x34);
if (parity) { data_hi(); } else { data_lo(); }
WAIT(clock_lo, 100, 0x35);
/* Stop bit */
WAIT(clock_hi, 100, 0x34);
data_hi();
/* End */
WAIT(data_lo, 100, 0x36);
idle();
IBM4704_INT_ON();
return 0;
ERROR:
idle();
if (ibm4704_error > 0x30) {
xprintf("S:%02X ", ibm4704_error);
}
IBM4704_INT_ON();
return -1;
}
/* inhibit device to send */
static inline void inhibit(void)
{
clock_lo();
data_hi();
}