void
kbd_wskbd_attach(struct kbd_softc *k, int isconsole)
{
k->k_isconsole = isconsole;
config_interrupts(k->k_dev, kbd_enable);
}
main()
{
LOG_printf(&myLog, "main begin");
/*DSK6713_LED_toggle(0);
DSK6713_LED_toggle(1);
DSK6713_LED_toggle(2);
DSK6713_LED_toggle(3);*/
hMcbsp = 0;
CSL_init();
/* Configure McBSP0 and AIC23 */
Config_DSK6713_AIC23();
/* Configure McBSP1*/
hMcbsp = MCBSP_open(MCBSP_DEV1, MCBSP_OPEN_RESET);
MCBSP_config(hMcbsp, &datainterface_config);
/* configure EDMA */
config_EDMA();
/* finally the interrupts */
config_interrupts();
//MCBSP_start(hMcbsp, RRST, 0xffffffff); // EIGEN!!!: Start Field: Recieve
MCBSP_start(hMcbsp, MCBSP_RCV_START | MCBSP_XMIT_START | MCBSP_SRGR_START | MCBSP_SRGR_FRAMESYNC, 220); // EIGEN!!!: Start Field: Recieve
// Es gibt auch noch MCBSP_SRGR_START (start sample Rate Generator) und MCBSP_SRGR_FRAMESYNC (start frame sync. generation)
MCBSP_write(hMcbsp, 0x0); /* one shot */
LOG_printf(&myLog, "main end");
//DSK6713_LED_toggle(2);
} /* finished*/
static void
oj6sh_attach(device_t parent, device_t self, void *aux)
{
struct oj6sh_softc *sc = device_private(self);
struct spi_attach_args *sa = aux;
struct wsmousedev_attach_args a;
aprint_normal(": OJ6SH-T25 Optical Joystick\n");
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
sc->sc_dev = self;
sc->sc_enabled = 0;
callout_init(&sc->sc_c, 0);
sc->sc_sh = sa->sa_handle;
a.accessops = &oj6sh_accessops;
a.accesscookie = sc;
sc->sc_wsmousedev = config_found(self, &a, wsmousedevprint);
config_interrupts(self, oj6sh_doattach);
}
static void
slugiic_attach(struct device *parent, struct device *self, void *arg)
{
struct slugiic_softc *sc = (struct slugiic_softc *)self;
aprint_naive("\n");
aprint_normal(": I2C bus\n");
sc->sc_ic.ic_cookie = sc;
sc->sc_ic.ic_acquire_bus = slugiic_acquire_bus;
sc->sc_ic.ic_release_bus = slugiic_release_bus;
sc->sc_ic.ic_exec = NULL;
sc->sc_ic.ic_send_start = slugiic_send_start;
sc->sc_ic.ic_send_stop = slugiic_send_stop;
sc->sc_ic.ic_initiate_xfer = slugiic_initiate_xfer;
sc->sc_ic.ic_read_byte = slugiic_read_byte;
sc->sc_ic.ic_write_byte = slugiic_write_byte;
sc->sc_ibo.ibo_set_dir = slugiic_set_dir;
sc->sc_ibo.ibo_set_bits = slugiic_set_bits;
sc->sc_ibo.ibo_read_bits = slugiic_read_bits;
sc->sc_ibo.ibo_bits[I2C_BIT_SDA] = GPIO_I2C_SDA_BIT;
sc->sc_ibo.ibo_bits[I2C_BIT_SCL] = GPIO_I2C_SCL_BIT;
sc->sc_ibo.ibo_bits[I2C_BIT_OUTPUT] = 1;
sc->sc_ibo.ibo_bits[I2C_BIT_INPUT] = 0;
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
sc->sc_dirout = 0;
/*
* Defer until ixp425_softc has been initialised
*/
config_interrupts(self, slugiic_deferred_attach);
}
void
fdcattach(struct fdc_softc *fdc)
{
mutex_init(&fdc->sc_mtx, MUTEX_DEFAULT, IPL_BIO);
cv_init(&fdc->sc_cv, "fdcwakeup");
callout_init(&fdc->sc_timo_ch, 0);
callout_init(&fdc->sc_intr_ch, 0);
fdc->sc_state = DEVIDLE;
TAILQ_INIT(&fdc->sc_drives);
fdc->sc_maxiosize = isa_dmamaxsize(fdc->sc_ic, fdc->sc_drq);
if (isa_drq_alloc(fdc->sc_ic, fdc->sc_drq) != 0) {
aprint_normal_dev(fdc->sc_dev, "can't reserve drq %d\n",
fdc->sc_drq);
return;
}
if (isa_dmamap_create(fdc->sc_ic, fdc->sc_drq, fdc->sc_maxiosize,
BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) {
aprint_normal_dev(fdc->sc_dev, "can't set up ISA DMA map\n");
return;
}
config_interrupts(fdc->sc_dev, fdcfinishattach);
if (!pmf_device_register(fdc->sc_dev, fdcsuspend, fdcresume)) {
aprint_error_dev(fdc->sc_dev,
"cannot set power mgmt handler\n");
}
}
main()
{
CSL_init();
/* Configure McBSP0 and AIC23 */
Config_DSK6713_AIC23();
/* Configure McBSP1*/
hMcbsp = MCBSP_open(MCBSP_DEV1, MCBSP_OPEN_RESET);
MCBSP_config(hMcbsp, &datainterface_config);
/* configure EDMA */
config_EDMA();
DSK6713_LED_off(0);
DSK6713_LED_on(1);
DSK6713_LED_off(2);
DSK6713_LED_on(3);
/* finally the interrupts */
config_interrupts();
MCBSP_start(hMcbsp, MCBSP_XMIT_START | MCBSP_RCV_START, 0xffffffff); // Start Audio IN & OUT transmision
MCBSP_write(hMcbsp, 0x0); /* one shot */
configComplete = 1;
//t_reg = DSK6713_rget(DSK6713_MISC);
//t_reg |= MCBSP1SEL; // Set MCBSP1SEL to 1 (extern)
//DSK6713_rset(DSK6713_MISC,t_reg);
} /* finished*/
void
hil_gsc_attach(device_t parent, device_t self, void *aux)
{
struct hil_gsc_softc *gsc = device_private(self);
struct hil_softc *sc = &gsc->sc_hs;
struct gsc_attach_args *ga = aux;
int pagezero_cookie;
sc->sc_dev = self;
sc->sc_bst = ga->ga_iot;
if (bus_space_map(ga->ga_iot, ga->ga_hpa,
HILMAPSIZE, 0, &sc->sc_bsh)) {
aprint_error(": couldn't map hil controller\n");
return;
}
pagezero_cookie = hp700_pagezero_map();
gsc->sc_hil_console = ga->ga_dp.dp_mod == PAGE0->mem_kbd.pz_dp.dp_mod &&
memcmp(ga->ga_dp.dp_bc, PAGE0->mem_kbd.pz_dp.dp_bc, 6) == 0;
hp700_pagezero_unmap(pagezero_cookie);
hil_attach(sc, &gsc->sc_hil_console);
gsc->sc_ih = hp700_intr_establish(IPL_TTY, hil_intr, sc,
ga->ga_ir, ga->ga_irq);
config_interrupts(self, hil_attach_deferred);
}
int
vcons_init(struct vcons_data *vd, void *cookie, struct wsscreen_descr *def,
struct wsdisplay_accessops *ao)
{
/* zero out everything so we can rely on untouched fields being 0 */
memset(vd, 0, sizeof(struct vcons_data));
vd->cookie = cookie;
vd->init_screen = vcons_dummy_init_screen;
vd->show_screen_cb = NULL;
/* keep a copy of the accessops that we replace below with our
* own wrappers */
vd->ioctl = ao->ioctl;
/* configure the accessops */
ao->ioctl = vcons_ioctl;
ao->alloc_screen = vcons_alloc_screen;
ao->free_screen = vcons_free_screen;
ao->show_screen = vcons_show_screen;
#ifdef WSDISPLAY_SCROLLSUPPORT
ao->scroll = vcons_scroll;
#endif
LIST_INIT(&vd->screens);
vd->active = NULL;
vd->wanted = NULL;
vd->currenttype = def;
callout_init(&vd->switch_callout, 0);
callout_setfunc(&vd->switch_callout, vcons_do_switch, vd);
#ifdef VCONS_DRAW_INTR
vd->cells = 0;
vd->attrs = NULL;
vd->chars = NULL;
vd->cursor_offset = -1;
#endif
/*
* a lock to serialize access to the framebuffer.
* when switching screens we need to make sure there's no rasops
* operation in progress
*/
#ifdef DIAGNOSTIC
vd->switch_poll_count = 0;
#endif
#ifdef VCONS_DRAW_INTR
vd->intr_softint = softint_establish(SOFTINT_SERIAL,
vcons_softintr, vd);
callout_init(&vd->intr, 0);
callout_setfunc(&vd->intr, vcons_intr, vd);
vd->intr_valid = 1;
/* XXX assume that the 'dev' arg is never dereferenced */
config_interrupts((device_t)vd, vcons_intr_enable);
#endif
return 0;
}
static void
slugled_attach(device_t parent, device_t self, void *aux)
{
aprint_normal(": LED support\n");
slugled_attached = 1;
config_interrupts(self, slugled_defer);
}
static void
slugbutt_attach(device_t parent, device_t self, void *aux)
{
slugbutt_attached = 1;
aprint_normal(": Power and Reset buttons\n");
/* Defer, to ensure ixp425_softc has been initialised */
config_interrupts(self, slugbutt_deferred);
}
static void
acpi_dalb_attach(device_t parent, device_t self, void *aux)
{
struct acpi_dalb_softc *sc = device_private(self);
struct acpi_attach_args *aa = aux;
aprint_naive("\n");
aprint_normal(": Direct Application Launch Button\n");
sc->sc_dev = self;
sc->sc_node = aa->aa_node;
config_interrupts(self, acpi_dalb_init);
(void)pmf_device_register(self, NULL, acpi_dalb_resume);
(void)acpi_register_notify(sc->sc_node, acpi_dalb_notify_handler);
sc->sc_smpsw_valid = false;
acpi_dalb_sysmon_init(sc);
}
static void
plmmc_ifpga_attach(device_t parent, device_t self, void *aux)
{
struct plmmc_softc *sc = device_private(self);
struct ifpga_attach_args *ifa = aux;
sc->sc_dev = self;
sc->sc_clock_freq = IFPGA_MMC_CLK;
sc->sc_bst = ifa->ifa_iot;
if (bus_space_map(ifa->ifa_iot, ifa->ifa_addr, IFPGA_MMC_SIZE, 0,
&sc->sc_bsh)) {
printf("%s: unable to map device\n", device_xname(sc->sc_dev));
return;
}
aprint_naive("\n");
aprint_normal("\n");
#if 0
sc->sc_ih = ifpga_intr_establish(ifa->ifa_irq, IPL_BIO, plmmc_intr, sc);
#endif
config_interrupts(self, plmmc_ifpga_attach_i);
}
static void
acpicpu_attach(device_t parent, device_t self, void *aux)
{
struct acpicpu_softc *sc = device_private(self);
struct cpu_info *ci;
ACPI_HANDLE hdl;
cpuid_t id;
int rv;
ci = acpicpu_md_attach(parent, self, aux);
if (ci == NULL)
return;
sc->sc_ci = ci;
sc->sc_dev = self;
sc->sc_cold = true;
hdl = acpi_match_cpu_info(ci);
if (hdl == NULL) {
aprint_normal(": failed to match processor\n");
return;
}
sc->sc_node = acpi_match_node(hdl);
if (acpicpu_once_attach() != 0) {
aprint_normal(": failed to initialize\n");
return;
}
KASSERT(acpi_softc != NULL);
KASSERT(acpicpu_sc != NULL);
KASSERT(sc->sc_node != NULL);
id = sc->sc_ci->ci_acpiid;
if (acpicpu_sc[id] != NULL) {
aprint_normal(": already attached\n");
return;
}
aprint_naive("\n");
aprint_normal(": ACPI CPU\n");
rv = acpicpu_object(sc->sc_node->ad_handle, &sc->sc_object);
if (ACPI_FAILURE(rv))
aprint_verbose_dev(self, "failed to obtain CPU object\n");
acpicpu_count++;
acpicpu_sc[id] = sc;
sc->sc_cap = acpicpu_cap(sc);
sc->sc_ncpus = acpi_md_ncpus();
sc->sc_flags = acpicpu_md_flags();
KASSERT(acpicpu_count <= sc->sc_ncpus);
KASSERT(sc->sc_node->ad_device == NULL);
sc->sc_node->ad_device = self;
mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_NONE);
acpicpu_cstate_attach(self);
acpicpu_pstate_attach(self);
acpicpu_tstate_attach(self);
acpicpu_debug_print(self);
acpicpu_evcnt_attach(self);
(void)config_interrupts(self, acpicpu_start);
(void)acpi_register_notify(sc->sc_node, acpicpu_notify);
(void)pmf_device_register(self, acpicpu_suspend, acpicpu_resume);
}
static void
cuda_attach(device_t parent, device_t dev, void *aux)
{
struct confargs *ca = aux;
struct cuda_softc *sc = device_private(dev);
struct i2cbus_attach_args iba;
static struct cuda_attach_args caa;
int irq = ca->ca_intr[0];
int node, i, child;
char name[32];
sc->sc_dev = dev;
node = of_getnode_byname(OF_parent(ca->ca_node), "extint-gpio1");
if (node)
OF_getprop(node, "interrupts", &irq, 4);
printf(" irq %d: ", irq);
sc->sc_node = ca->ca_node;
sc->sc_memt = ca->ca_tag;
sc->sc_sent = 0;
sc->sc_received = 0;
sc->sc_waiting = 0;
sc->sc_polling = 0;
sc->sc_state = CUDA_NOTREADY;
sc->sc_error = 0;
sc->sc_i2c_read_len = 0;
if (bus_space_map(sc->sc_memt, ca->ca_reg[0] + ca->ca_baseaddr,
ca->ca_reg[1], 0, &sc->sc_memh) != 0) {
printf("%s: unable to map registers\n", dev->dv_xname);
return;
}
sc->sc_ih = intr_establish(irq, IST_EDGE, IPL_TTY, cuda_intr, sc);
printf("\n");
for (i = 0; i < 16; i++) {
sc->sc_handlers[i].handler = NULL;
sc->sc_handlers[i].cookie = NULL;
}
cuda_init(sc);
/* now attach children */
config_interrupts(dev, cuda_final);
cuda_set_handler(sc, CUDA_ERROR, cuda_error_handler, sc);
cuda_set_handler(sc, CUDA_PSEUDO, cuda_todr_handler, sc);
child = OF_child(ca->ca_node);
while (child != 0) {
if (OF_getprop(child, "name", name, 32) == 0)
continue;
if (strncmp(name, "adb", 4) == 0) {
cuda_set_handler(sc, CUDA_ADB, cuda_adb_handler, sc);
sc->sc_adbops.cookie = sc;
sc->sc_adbops.send = cuda_adb_send;
sc->sc_adbops.poll = cuda_adb_poll;
sc->sc_adbops.autopoll = cuda_autopoll;
sc->sc_adbops.set_handler = cuda_adb_set_handler;
config_found_ia(dev, "adb_bus", &sc->sc_adbops,
nadb_print);
} else if (strncmp(name, "rtc", 4) == 0) {
sc->sc_todr.todr_gettime = cuda_todr_get;
sc->sc_todr.todr_settime = cuda_todr_set;
sc->sc_todr.cookie = sc;
todr_attach(&sc->sc_todr);
}
child = OF_peer(child);
}
caa.cookie = sc;
caa.set_handler = cuda_set_handler;
caa.send = cuda_send;
caa.poll = cuda_poll;
#if notyet
config_found(dev, &caa, cuda_print);
#endif
mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE);
iba.iba_tag = &sc->sc_i2c;
sc->sc_i2c.ic_cookie = sc;
sc->sc_i2c.ic_acquire_bus = cuda_i2c_acquire_bus;
sc->sc_i2c.ic_release_bus = cuda_i2c_release_bus;
sc->sc_i2c.ic_send_start = NULL;
sc->sc_i2c.ic_send_stop = NULL;
sc->sc_i2c.ic_initiate_xfer = NULL;
sc->sc_i2c.ic_read_byte = NULL;
sc->sc_i2c.ic_write_byte = NULL;
sc->sc_i2c.ic_exec = cuda_i2c_exec;
config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print);
if (cuda0 == NULL)
cuda0 = &caa;
}
static void
obio_setup_gpios(struct obio_softc *sc, int node)
{
uint32_t gpio_base, reg[6];
const struct sysctlnode *sysctl_node, *me, *freq;
struct cpufreq *cf = &sc->sc_cf;
char name[32];
int child, use_dfs, cpunode, hiclock;
if (of_compatible(sc->sc_node, keylargo) == -1)
return;
if (OF_getprop(node, "reg", reg, sizeof(reg)) < 4)
return;
gpio_base = reg[0];
DPRINTF("gpio_base: %02x\n", gpio_base);
/* now look for voltage and bus speed gpios */
use_dfs = 0;
for (child = OF_child(node); child; child = OF_peer(child)) {
if (OF_getprop(child, "name", name, sizeof(name)) < 1)
continue;
if (OF_getprop(child, "reg", reg, sizeof(reg)) < 4)
continue;
/*
* These register offsets either have to be added to the obio
* base address or to the gpio base address. This differs
* even in the same OF-tree! So we guess the offset is
* based on obio when it is larger than the gpio_base.
*/
if (reg[0] >= gpio_base)
reg[0] -= gpio_base;
if (strcmp(name, "frequency-gpio") == 0) {
DPRINTF("found frequency_gpio at %02x\n", reg[0]);
sc->sc_busspeed = gpio_base + reg[0];
}
if (strcmp(name, "voltage-gpio") == 0) {
DPRINTF("found voltage_gpio at %02x\n", reg[0]);
sc->sc_voltage = gpio_base + reg[0];
}
if (strcmp(name, "cpu-vcore-select") == 0) {
DPRINTF("found cpu-vcore-select at %02x\n", reg[0]);
sc->sc_voltage = gpio_base + reg[0];
/* frequency gpio is not needed, we use cpu's DFS */
use_dfs = 1;
}
}
if ((sc->sc_voltage < 0) || (sc->sc_busspeed < 0 && !use_dfs))
return;
printf("%s: enabling Intrepid CPU speed control\n",
device_xname(sc->sc_dev));
sc->sc_spd_lo = curcpu()->ci_khz / 1000;
hiclock = 0;
cpunode = OF_finddevice("/cpus/@0");
OF_getprop(cpunode, "clock-frequency", &hiclock, 4);
if (hiclock != 0)
sc->sc_spd_hi = (hiclock + 500000) / 1000000;
printf("hiclock: %d\n", sc->sc_spd_hi);
sysctl_node = NULL;
if (sysctl_createv(NULL, 0, NULL,
&me,
CTLFLAG_READWRITE, CTLTYPE_NODE, "intrepid", NULL, NULL,
0, NULL, 0, CTL_MACHDEP, CTL_CREATE, CTL_EOL) != 0)
printf("couldn't create 'intrepid' node\n");
if (sysctl_createv(NULL, 0, NULL,
&freq,
CTLFLAG_READWRITE, CTLTYPE_NODE, "frequency", NULL, NULL,
0, NULL, 0, CTL_MACHDEP, me->sysctl_num, CTL_CREATE, CTL_EOL) != 0)
printf("couldn't create 'frequency' node\n");
if (sysctl_createv(NULL, 0, NULL,
&sysctl_node,
CTLFLAG_READWRITE | CTLFLAG_OWNDESC,
CTLTYPE_INT, "target", "CPU speed", sysctl_cpuspeed_temp,
0, (void *)sc, 0, CTL_MACHDEP, me->sysctl_num, freq->sysctl_num,
CTL_CREATE, CTL_EOL) == 0) {
} else
printf("couldn't create 'target' node\n");
if (sysctl_createv(NULL, 0, NULL,
&sysctl_node,
CTLFLAG_READWRITE,
CTLTYPE_INT, "current", NULL, sysctl_cpuspeed_cur,
1, (void *)sc, 0, CTL_MACHDEP, me->sysctl_num, freq->sysctl_num,
CTL_CREATE, CTL_EOL) == 0) {
} else
printf("couldn't create 'current' node\n");
if (sysctl_createv(NULL, 0, NULL,
&sysctl_node,
CTLFLAG_READWRITE,
CTLTYPE_STRING, "available", NULL, sysctl_cpuspeed_available,
2, (void *)sc, 0, CTL_MACHDEP, me->sysctl_num, freq->sysctl_num,
CTL_CREATE, CTL_EOL) == 0) {
} else
printf("couldn't create 'available' node\n");
printf("speed: %d\n", curcpu()->ci_khz);
/* support cpufreq */
snprintf(cf->cf_name, CPUFREQ_NAME_MAX, "Intrepid");
cf->cf_state[0].cfs_freq = sc->sc_spd_hi;
cf->cf_state[1].cfs_freq = sc->sc_spd_lo;
cf->cf_state_count = 2;
cf->cf_mp = FALSE;
cf->cf_cookie = sc;
cf->cf_get_freq = obio_get_freq;
cf->cf_set_freq = obio_set_freq;
/*
* XXX
* cpufreq_register() calls xc_broadcast() which relies on kthreads
* running so we need to postpone it
*/
config_interrupts(sc->sc_dev, obio_setup_cpufreq);
}
void
pcic_isapnp_attach(struct device *parent, struct device *self,
void *aux)
{
struct pcic_softc *sc = device_private(self);
struct pcic_isa_softc *isc = device_private(self);
struct isapnp_attach_args *ipa = aux;
isa_chipset_tag_t ic = ipa->ipa_ic;
bus_space_tag_t iot = ipa->ipa_iot;
bus_space_tag_t memt = ipa->ipa_memt;
bus_space_handle_t ioh;
bus_space_handle_t memh;
bus_addr_t maddr;
int msize;
int tmp1;
printf("\n");
if (isapnp_config(iot, memt, ipa)) {
aprint_error_dev(&sc->dev, "error in region allocation\n");
return;
}
printf("%s: %s %s", device_xname(&sc->dev), ipa->ipa_devident,
ipa->ipa_devclass);
/* sanity check that we get at least one hunk of IO space.. */
if (ipa->ipa_nio < 1) {
aprint_error_dev(&sc->dev, "failed to get one chunk of i/o space\n");
return;
}
/* Find i/o space. */
ioh = ipa->ipa_io[0].h;
/* sanity check to make sure we have a real PCIC there.. */
bus_space_write_1(iot, ioh, PCIC_REG_INDEX, C0SA + PCIC_IDENT);
tmp1 = bus_space_read_1(iot, ioh, PCIC_REG_DATA);
printf("(ident 0x%x", tmp1);
if (pcic_ident_ok(tmp1)) {
printf(" OK)");
} else {
printf(" Not OK)\n");
return;
}
msize = 0x4000;
if (isa_mem_alloc (memt, msize, msize, 0, 0,
&maddr, &memh)) {
printf(": can't alloc mem space\n");
return;
}
printf(": using iomem 0x%lx iosiz 0x%x", maddr, msize);
sc->membase = maddr;
sc->subregionmask = (1 << (msize / PCIC_MEM_PAGESIZE)) - 1;
isc->sc_ic = ic;
sc->pct = (pcmcia_chipset_tag_t) & pcic_isa_functions;
sc->iot = iot;
sc->ioh = ioh;
sc->memt = memt;
sc->memh = memh;
/*
* allocate an irq. it will be used by both controllers. I could
* use two different interrupts, but interrupts are relatively
* scarce, shareable, and for PCIC controllers, very infrequent.
*/
if (ipa->ipa_nirq > 0)
sc->irq = ipa->ipa_irq[0].num;
else
sc->irq = -1;
printf("\n");
pcic_attach(sc);
pcic_isa_bus_width_probe(sc, iot, ioh, ipa->ipa_io[0].base,
ipa->ipa_io[0].length);
pcic_attach_sockets(sc);
config_interrupts(self, pcic_isa_config_interrupts);
}
static void
auich_attach(device_t parent, device_t self, void *aux)
{
struct auich_softc *sc = device_private(self);
struct pci_attach_args *pa;
pcireg_t v, subdev;
const char *intrstr;
const struct auich_devtype *d;
const struct sysctlnode *node, *node_ac97clock;
int err, node_mib, i;
sc->sc_dev = self;
pa = aux;
if ((d = auich_lookup(pa, auich_modem_devices)) != NULL) {
sc->sc_modem_offset = 0x10;
sc->sc_codectype = AC97_CODEC_TYPE_MODEM;
} else if ((d = auich_lookup(pa, auich_audio_devices)) != NULL) {
sc->sc_modem_offset = 0;
sc->sc_codectype = AC97_CODEC_TYPE_AUDIO;
} else
panic("auich_attach: impossible");
if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO)
aprint_naive(": Audio controller\n");
else
aprint_naive(": Modem controller\n");
sc->sc_pc = pa->pa_pc;
sc->sc_pt = pa->pa_tag;
aprint_normal(": %s\n", d->name);
if (d->id == PCIID_ICH4 || d->id == PCIID_ICH5 || d->id == PCIID_ICH6
|| d->id == PCIID_ICH7 || d->id == PCIID_I6300ESB
|| d->id == PCIID_ICH4MODEM) {
/*
* Use native mode for Intel 6300ESB and ICH4/ICH5/ICH6/ICH7
*/
if (pci_mapreg_map(pa, ICH_MMBAR, PCI_MAPREG_TYPE_MEM, 0,
&sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) {
goto retry_map;
}
if (pci_mapreg_map(pa, ICH_MBBAR, PCI_MAPREG_TYPE_MEM, 0,
&sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) {
goto retry_map;
}
goto map_done;
} else
goto non_native_map;
retry_map:
sc->sc_iose = 1;
v = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_CFG);
pci_conf_write(pa->pa_pc, pa->pa_tag, ICH_CFG,
v | ICH_CFG_IOSE);
non_native_map:
if (pci_mapreg_map(pa, ICH_NAMBAR, PCI_MAPREG_TYPE_IO, 0,
&sc->iot, &sc->mix_ioh, NULL, &sc->mix_size)) {
aprint_error_dev(self, "can't map codec i/o space\n");
return;
}
if (pci_mapreg_map(pa, ICH_NABMBAR, PCI_MAPREG_TYPE_IO, 0,
&sc->iot, &sc->aud_ioh, NULL, &sc->aud_size)) {
aprint_error_dev(self, "can't map device i/o space\n");
return;
}
map_done:
sc->dmat = pa->pa_dmat;
/* enable bus mastering */
v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
v | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_BACKTOBACK_ENABLE);
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
/* Map and establish the interrupt. */
if (pci_intr_map(pa, &sc->intrh)) {
aprint_error_dev(self, "can't map interrupt\n");
return;
}
intrstr = pci_intr_string(pa->pa_pc, sc->intrh);
sc->sc_ih = pci_intr_establish(pa->pa_pc, sc->intrh, IPL_AUDIO,
auich_intr, sc);
if (sc->sc_ih == NULL) {
aprint_error_dev(self, "can't establish interrupt");
if (intrstr != NULL)
aprint_error(" at %s", intrstr);
aprint_error("\n");
return;
}
aprint_normal_dev(self, "interrupting at %s\n", intrstr);
snprintf(sc->sc_audev.name, MAX_AUDIO_DEV_LEN, "%s AC97", d->shortname);
snprintf(sc->sc_audev.version, MAX_AUDIO_DEV_LEN,
"0x%02x", PCI_REVISION(pa->pa_class));
strlcpy(sc->sc_audev.config, device_xname(self), MAX_AUDIO_DEV_LEN);
/* SiS 7012 needs special handling */
if (d->id == PCIID_SIS7012) {
sc->sc_sts_reg = ICH_PICB;
sc->sc_sample_shift = 0;
sc->sc_pcm246_mask = ICH_SIS_PCM246_MASK;
sc->sc_pcm2 = ICH_SIS_PCM2;
sc->sc_pcm4 = ICH_SIS_PCM4;
sc->sc_pcm6 = ICH_SIS_PCM6;
/* Un-mute output. From Linux. */
bus_space_write_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL,
bus_space_read_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL) |
ICH_SIS_CTL_UNMUTE);
} else {
sc->sc_sts_reg = ICH_STS;
sc->sc_sample_shift = 1;
sc->sc_pcm246_mask = ICH_PCM246_MASK;
sc->sc_pcm2 = ICH_PCM2;
sc->sc_pcm4 = ICH_PCM4;
sc->sc_pcm6 = ICH_PCM6;
}
/* Workaround for a 440MX B-stepping erratum */
sc->sc_dmamap_flags = BUS_DMA_COHERENT;
if (d->id == PCIID_440MX) {
sc->sc_dmamap_flags |= BUS_DMA_NOCACHE;
aprint_normal_dev(self, "DMA bug workaround enabled\n");
}
/* Set up DMA lists. */
sc->pcmo.qptr = sc->pcmi.qptr = sc->mici.qptr = 0;
auich_alloc_cdata(sc);
DPRINTF(ICH_DEBUG_DMA, ("auich_attach: lists %p %p %p\n",
sc->pcmo.dmalist, sc->pcmi.dmalist, sc->mici.dmalist));
/* Modem codecs are always the secondary codec on ICH */
sc->sc_codecnum = sc->sc_codectype == AC97_CODEC_TYPE_MODEM ? 1 : 0;
sc->host_if.arg = sc;
sc->host_if.attach = auich_attach_codec;
sc->host_if.read = auich_read_codec;
sc->host_if.write = auich_write_codec;
sc->host_if.reset = auich_reset_codec;
sc->host_if.flags = auich_flags_codec;
sc->host_if.spdif_event = auich_spdif_event;
subdev = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
switch (subdev) {
case 0x202f161f: /* Gateway 7326GZ */
case 0x203a161f: /* Gateway 4028GZ */
case 0x204c161f: /* Kvazar-Micro Senator 3592XT */
case 0x8144104d: /* Sony VAIO PCG-TR* */
case 0x8197104d: /* Sony S1XP */
case 0x81c0104d: /* Sony VAIO type T */
case 0x81c5104d: /* Sony VAIO VGN-B1XP */
sc->sc_codecflags = AC97_HOST_INVERTED_EAMP;
break;
default:
sc->sc_codecflags = 0;
break;
}
if (ac97_attach_type(&sc->host_if, self, sc->sc_codectype,
&sc->sc_lock) != 0)
return;
mutex_enter(&sc->sc_lock);
sc->codec_if->vtbl->unlock(sc->codec_if);
sc->sc_fixedrate = AC97_IS_FIXED_RATE(sc->codec_if);
/* setup audio_format */
if (sc->sc_codectype == AC97_CODEC_TYPE_AUDIO) {
memcpy(sc->sc_audio_formats, auich_audio_formats, sizeof(auich_audio_formats));
if (!AC97_IS_4CH(sc->codec_if))
AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_4CH]);
if (!AC97_IS_6CH(sc->codec_if))
AUFMT_INVALIDATE(&sc->sc_audio_formats[AUICH_FORMATS_6CH]);
if (AC97_IS_FIXED_RATE(sc->codec_if)) {
for (i = 0; i < AUICH_AUDIO_NFORMATS; i++) {
sc->sc_audio_formats[i].frequency_type = 1;
sc->sc_audio_formats[i].frequency[0] = 48000;
}
}
mutex_exit(&sc->sc_lock);
if (0 != auconv_create_encodings(sc->sc_audio_formats, AUICH_AUDIO_NFORMATS,
&sc->sc_encodings))
return;
if (0 != auconv_create_encodings(auich_spdif_formats, AUICH_SPDIF_NFORMATS,
&sc->sc_spdif_encodings))
return;
} else {
mutex_exit(&sc->sc_lock);
memcpy(sc->sc_modem_formats, auich_modem_formats, sizeof(auich_modem_formats));
if (0 != auconv_create_encodings(sc->sc_modem_formats, AUICH_MODEM_NFORMATS,
&sc->sc_encodings))
return;
}
/* Watch for power change */
if (!pmf_device_register(self, NULL, auich_resume))
aprint_error_dev(self, "couldn't establish power handler\n");
config_interrupts(self, auich_finish_attach);
/* sysctl setup */
if (sc->sc_fixedrate && sc->sc_codectype == AC97_CODEC_TYPE_AUDIO)
return;
err = sysctl_createv(&sc->sc_log, 0, NULL, NULL, 0,
CTLTYPE_NODE, "hw", NULL, NULL, 0, NULL, 0,
CTL_HW, CTL_EOL);
if (err != 0)
goto sysctl_err;
err = sysctl_createv(&sc->sc_log, 0, NULL, &node, 0,
CTLTYPE_NODE, device_xname(self), NULL, NULL, 0,
NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
if (err != 0)
goto sysctl_err;
node_mib = node->sysctl_num;
if (!sc->sc_fixedrate) {
/* passing the sc address instead of &sc->sc_ac97_clock */
err = sysctl_createv(&sc->sc_log, 0, NULL, &node_ac97clock,
CTLFLAG_READWRITE,
CTLTYPE_INT, "ac97rate",
SYSCTL_DESCR("AC'97 codec link rate"),
auich_sysctl_verify, 0, (void *)sc, 0,
CTL_HW, node_mib, CTL_CREATE, CTL_EOL);
if (err != 0)
goto sysctl_err;
sc->sc_ac97_clock_mib = node_ac97clock->sysctl_num;
}
return;
sysctl_err:
printf("%s: failed to add sysctl nodes. (%d)\n",
device_xname(self), err);
return; /* failure of sysctl is not fatal. */
}
void
pcic_pci_attach(device_t parent, device_t self, void *aux)
{
struct pcic_pci_softc *psc = device_private(self);
struct pcic_softc *sc = &psc->sc_pcic;
struct pci_attach_args *pa = aux;
pci_chipset_tag_t pc = pa->pa_pc;
bus_space_tag_t memt = pa->pa_memt;
bus_space_handle_t memh;
const char *model;
sc->dev = self;
aprint_naive(": PCMCIA controller\n");
if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
&sc->iot, &sc->ioh, NULL, NULL)) {
aprint_error(": can't map i/o space\n");
return;
}
/*
* XXX need some memory for mapping pcmcia cards into. Ideally, this
* would be completely dynamic. Practically this doesn't work,
* because the extent mapper doesn't know about all the devices all
* the time. With ISA we could finesse the issue by specifying the
* memory region in the config line. We can't do that here, so we
* cheat for now. Jason Thorpe, you are my Savior, come up with a fix
* :-)
*/
/* Map mem space. */
if (bus_space_map(memt, 0xd0000, 0x4000, 0, &memh))
panic("pcic_pci_attach: can't map mem space");
sc->membase = 0xd0000;
sc->subregionmask = (1 << (0x4000 / PCIC_MEM_PAGESIZE)) - 1;
/* same deal for io allocation */
sc->iobase = 0x400;
sc->iosize = 0xbff;
/* end XXX */
sc->pct = &pcic_pci_functions;
sc->memt = memt;
sc->memh = memh;
switch (PCI_PRODUCT(pa->pa_id)) {
case PCI_PRODUCT_CIRRUS_CL_PD6729:
model = "Cirrus Logic PD6729 PCMCIA controller";
break;
default:
model = "Model unknown";
break;
}
aprint_normal(": %s\n", model);
/* Enable the card. */
pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
PCI_COMMAND_MASTER_ENABLE);
pcic_attach(sc);
/*
* Check to see if we're using PCI or ISA interrupts. I don't
* know of any i386 systems that use the 6729 in PCI interrupt
* mode, but maybe when the PCMCIA code runs on other platforms
* we'll need to fix this.
*/
pcic_write(&sc->handle[0], PCIC_CIRRUS_EXTENDED_INDEX,
PCIC_CIRRUS_EXT_CONTROL_1);
if ((pcic_read(&sc->handle[0], PCIC_CIRRUS_EXTENDED_DATA) &
PCIC_CIRRUS_EXT_CONTROL_1_PCI_INTR_MASK)) {
aprint_error_dev(self, "PCI interrupts not supported\n");
return;
}
psc->intr_est = pcic_pci_machdep_intr_est(pc);
sc->irq = -1;
#if 0
/* Map and establish the interrupt. */
sc->ih = pcic_pci_machdep_pcic_intr_establish(sc, pcic_intr);
if (sc->ih == NULL) {
aprint_error_dev(self, "couldn't map interrupt\n");
return;
}
#endif
/*
* Defer configuration of children until ISA has had its chance
* to use up whatever IO space and IRQs it wants. XXX This will
* only work if ISA is attached to a pcib, AND the PCI probe finds
* and defers the ISA attachment before this one.
*/
config_defer(self, pcic_pci_callback);
config_interrupts(self, pcic_isa_config_interrupts);
}
/* ARGSUSED */
static void
bcmemmc_attach(device_t parent, device_t self, void *aux)
{
struct bcmemmc_softc *sc = device_private(self);
prop_dictionary_t dict = device_properties(self);
struct amba_attach_args *aaa = aux;
prop_number_t frequency;
int error;
sc->sc.sc_dev = self;
sc->sc.sc_dmat = aaa->aaa_dmat;
sc->sc.sc_flags = 0;
sc->sc.sc_flags |= SDHC_FLAG_32BIT_ACCESS;
sc->sc.sc_flags |= SDHC_FLAG_HOSTCAPS;
sc->sc.sc_flags |= SDHC_FLAG_NO_HS_BIT;
sc->sc.sc_caps = SDHC_VOLTAGE_SUPP_3_3V | SDHC_HIGH_SPEED_SUPP |
(SDHC_MAX_BLK_LEN_1024 << SDHC_MAX_BLK_LEN_SHIFT);
sc->sc.sc_caps2 = SDHC_SDR50_SUPP;
sc->sc.sc_host = sc->sc_hosts;
sc->sc.sc_clkbase = 50000; /* Default to 50MHz */
sc->sc_iot = aaa->aaa_iot;
/* Fetch the EMMC clock frequency from property if set. */
frequency = prop_dictionary_get(dict, "frequency");
if (frequency != NULL) {
sc->sc.sc_clkbase = prop_number_integer_value(frequency) / 1000;
}
error = bus_space_map(sc->sc_iot, aaa->aaa_addr, aaa->aaa_size, 0,
&sc->sc_ioh);
if (error) {
aprint_error_dev(self,
"can't map registers for %s: %d\n", aaa->aaa_name, error);
return;
}
sc->sc_ios = aaa->aaa_size;
sc->sc_physaddr = aaa->aaa_addr;
aprint_naive(": SDHC controller\n");
aprint_normal(": SDHC controller\n");
sc->sc_ih = intr_establish(aaa->aaa_intr, IPL_SDMMC, IST_LEVEL, sdhc_intr,
&sc->sc);
if (sc->sc_ih == NULL) {
aprint_error_dev(self, "failed to establish interrupt %d\n",
aaa->aaa_intr);
goto fail;
}
aprint_normal_dev(self, "interrupting on intr %d\n", aaa->aaa_intr);
#if NBCMDMAC > 0
sc->sc_dmac = bcm_dmac_alloc(BCM_DMAC_TYPE_NORMAL, IPL_SDMMC,
bcmemmc_dma_done, sc);
if (sc->sc_dmac == NULL)
goto done;
sc->sc.sc_flags |= SDHC_FLAG_USE_DMA;
sc->sc.sc_flags |= SDHC_FLAG_EXTERNAL_DMA;
sc->sc.sc_caps |= SDHC_DMA_SUPPORT;
sc->sc.sc_vendor_transfer_data_dma = bcmemmc_xfer_data_dma;
sc->sc_state = EMMC_DMA_STATE_IDLE;
cv_init(&sc->sc_cv, "bcmemmcdma");
int rseg;
error = bus_dmamem_alloc(sc->sc.sc_dmat, PAGE_SIZE, PAGE_SIZE,
PAGE_SIZE, sc->sc_segs, 1, &rseg, BUS_DMA_WAITOK);
if (error) {
aprint_error_dev(self, "dmamem_alloc failed (%d)\n", error);
goto fail;
}
error = bus_dmamem_map(sc->sc.sc_dmat, sc->sc_segs, rseg, PAGE_SIZE,
(void **)&sc->sc_cblk, BUS_DMA_WAITOK);
if (error) {
aprint_error_dev(self, "dmamem_map failed (%d)\n", error);
goto fail;
}
KASSERT(sc->sc_cblk != NULL);
memset(sc->sc_cblk, 0, PAGE_SIZE);
error = bus_dmamap_create(sc->sc.sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0,
BUS_DMA_WAITOK, &sc->sc_dmamap);
if (error) {
aprint_error_dev(self, "dmamap_create failed (%d)\n", error);
goto fail;
}
error = bus_dmamap_load(sc->sc.sc_dmat, sc->sc_dmamap, sc->sc_cblk,
PAGE_SIZE, NULL, BUS_DMA_WAITOK|BUS_DMA_WRITE);
if (error) {
aprint_error_dev(self, "dmamap_load failed (%d)\n", error);
goto fail;
}
done:
#endif
config_interrupts(self, bcmemmc_attach_i);
return;
fail:
/* XXX add bus_dma failure cleanup */
if (sc->sc_ih) {
intr_disestablish(sc->sc_ih);
sc->sc_ih = NULL;
}
bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
}
