rt_int32_t mmcsd_go_idle(struct rt_mmcsd_host *host)
{
rt_int32_t err;
struct rt_mmcsd_cmd cmd;
if (!controller_is_spi(host)) {
mmcsd_set_chip_select(host, MMCSD_CS_HIGH);
mmcsd_delay_ms(1);
}
rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
cmd.cmd_code = GO_IDLE_STATE;
cmd.arg = 0;
cmd.flags = RESP_SPI_R1 | RESP_NONE | CMD_BC;
err = mmcsd_send_cmd(host, &cmd, 0);
mmcsd_delay_ms(1);
if (!controller_is_spi(host))
{
mmcsd_set_chip_select(host, MMCSD_CS_IGNORE);
mmcsd_delay_ms(1);
}
return err;
}
rt_err_t mmcsd_send_app_cmd(struct rt_mmcsd_host *host,
struct rt_mmcsd_card *card,
struct rt_mmcsd_cmd *cmd,
int retry)
{
struct rt_mmcsd_req req;
rt_uint32_t i;
rt_err_t err;
err = -RT_ERROR;
/*
* We have to resend MMC_APP_CMD for each attempt so
* we cannot use the retries field in mmc_command.
*/
for (i = 0;i <= retry;i++)
{
rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
err = mmcsd_app_cmd(host, card);
if (err)
{
/* no point in retrying; no APP commands allowed */
if (controller_is_spi(host))
{
if (cmd->resp[0] & R1_SPI_ILLEGAL_COMMAND)
break;
}
continue;
}
rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
rt_memset(cmd->resp, 0, sizeof(cmd->resp));
req.cmd = cmd;
//cmd->data = NULL;
mmcsd_send_request(host, &req);
err = cmd->err;
if (!cmd->err)
break;
/* no point in retrying illegal APP commands */
if (controller_is_spi(host))
{
if (cmd->resp[0] & R1_SPI_ILLEGAL_COMMAND)
break;
}
}
return err;
}
rt_int32_t sdio_io_send_op_cond(struct rt_mmcsd_host *host, rt_uint32_t ocr, rt_uint32_t
*cmd5_resp)
{
struct rt_mmcsd_cmd cmd;
rt_int32_t i, err = 0;
RT_ASSERT(host != RT_NULL);
rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
cmd.cmd_code = SD_IO_SEND_OP_COND;
cmd.arg = ocr;
cmd.flags = RESP_SPI_R4 | RESP_R4 | CMD_BCR;
for (i = 100; i; i--)
{
err = mmcsd_send_cmd(host, &cmd, 0);
if (err)
break;
/* if we're just probing, do a single pass */
if (ocr == 0)
break;
/* otherwise wait until reset completes */
if (controller_is_spi(host))
{
/*
* Both R1_SPI_IDLE and MMC_CARD_BUSY indicate
* an initialized card under SPI, but some cards
* (Marvell's) only behave when looking at this
* one.
*/
if (cmd.resp[1] & CARD_BUSY)
break;
}
else
{
if (cmd.resp[0] & CARD_BUSY)
break;
}
err = -RT_ETIMEOUT;
mmcsd_delay_ms(10);
}
if (cmd5_resp)
*cmd5_resp = cmd.resp[controller_is_spi(host) ? 1 : 0];
return err;
}
rt_err_t mmcsd_send_app_op_cond(struct rt_mmcsd_host *host,
rt_uint32_t ocr,
rt_uint32_t *rocr)
{
struct rt_mmcsd_cmd cmd;
rt_uint32_t i;
rt_err_t err = RT_EOK;
rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
cmd.cmd_code = SD_APP_OP_COND;
if (controller_is_spi(host))
cmd.arg = ocr & (1 << 30); /* SPI only defines one bit */
else
cmd.arg = ocr;
cmd.flags = RESP_SPI_R1 | RESP_R3 | CMD_BCR;
for (i = 100; i; i--)
{
err = mmcsd_send_app_cmd(host, RT_NULL, &cmd, 3);
if (err)
break;
/* if we're just probing, do a single pass */
if (ocr == 0)
break;
/* otherwise wait until reset completes */
if (controller_is_spi(host))
{
if (!(cmd.resp[0] & R1_SPI_IDLE))
break;
}
else
{
if (cmd.resp[0] & CARD_BUSY)
break;
}
err = -RT_ETIMEOUT;
mmcsd_delay_ms(10); //delay 10ms
}
if (rocr && !controller_is_spi(host))
*rocr = cmd.resp[0];
return err;
}
static rt_err_t mmcsd_app_cmd(struct rt_mmcsd_host *host,
struct rt_mmcsd_card *card)
{
rt_err_t err;
struct rt_mmcsd_cmd cmd = {0};
cmd.cmd_code = APP_CMD;
if (card)
{
cmd.arg = card->rca << 16;
cmd.flags = RESP_R1 | CMD_AC;
}
else
{
cmd.arg = 0;
cmd.flags = RESP_R1 | CMD_BCR;
}
err = mmcsd_send_cmd(host, &cmd, 0);
if (err)
return err;
/* Check that card supported application commands */
if (!controller_is_spi(host) && !(cmd.resp[0] & R1_APP_CMD))
return -RT_ERROR;
return RT_EOK;
}
static void mmcsd_power_up(struct rt_mmcsd_host *host)
{
int bit = fls(host->valid_ocr) - 1;
host->io_cfg.vdd = bit;
if (controller_is_spi(host))
{
host->io_cfg.chip_select = MMCSD_CS_HIGH;
host->io_cfg.bus_mode = MMCSD_BUSMODE_PUSHPULL;
}
else
{
host->io_cfg.chip_select = MMCSD_CS_IGNORE;
host->io_cfg.bus_mode = MMCSD_BUSMODE_OPENDRAIN;
}
host->io_cfg.power_mode = MMCSD_POWER_UP;
host->io_cfg.bus_width = MMCSD_BUS_WIDTH_1;
mmcsd_set_iocfg(host);
/*
* This delay should be sufficient to allow the power supply
* to reach the minimum voltage.
*/
mmcsd_delay_ms(10);
host->io_cfg.clock = host->freq_min;
host->io_cfg.power_mode = MMCSD_POWER_ON;
mmcsd_set_iocfg(host);
/*
* This delay must be at least 74 clock sizes, or 1 ms, or the
* time required to reach a stable voltage.
*/
mmcsd_delay_ms(10);
}
rt_int32_t sdio_io_rw_direct(struct rt_mmcsd_card *card, rt_int32_t rw, rt_uint32_t fn,
rt_uint32_t reg_addr, rt_uint8_t *pdata, rt_uint8_t raw)
{
struct rt_mmcsd_cmd cmd;
rt_int32_t err;
RT_ASSERT(card != RT_NULL);
RT_ASSERT(fn <= SDIO_MAX_FUNCTIONS);
if (reg_addr & ~SDIO_ARG_CMD53_REG_MASK)
return -RT_ERROR;
rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
cmd.cmd_code = SD_IO_RW_DIRECT;
cmd.arg = rw ? SDIO_ARG_CMD52_WRITE : SDIO_ARG_CMD52_READ;
cmd.arg |= fn << SDIO_ARG_CMD52_FUNC_SHIFT;
cmd.arg |= raw ? SDIO_ARG_CMD52_RAW_FLAG : 0x00000000;
cmd.arg |= reg_addr << SDIO_ARG_CMD52_REG_SHIFT;
cmd.arg |= *pdata;
cmd.flags = RESP_SPI_R5 | RESP_R5 | CMD_AC;
err = mmcsd_send_cmd(card->host, &cmd, 0);
if (err)
return err;
if (!controller_is_spi(card->host))
{
if (cmd.resp[0] & R5_ERROR)
return -RT_EIO;
if (cmd.resp[0] & R5_FUNCTION_NUMBER)
return -RT_ERROR;
if (cmd.resp[0] & R5_OUT_OF_RANGE)
return -RT_ERROR;
}
if (!rw || raw)
{
if (controller_is_spi(card->host))
*pdata = (cmd.resp[0] >> 8) & 0xFF;
else
*pdata = cmd.resp[0] & 0xFF;
}
static void mmcsd_power_off(struct rt_mmcsd_host *host)
{
host->io_cfg.clock = 0;
host->io_cfg.vdd = 0;
if (!controller_is_spi(host))
{
host->io_cfg.bus_mode = MMCSD_BUSMODE_OPENDRAIN;
host->io_cfg.chip_select = MMCSD_CS_IGNORE;
}
host->io_cfg.power_mode = MMCSD_POWER_OFF;
host->io_cfg.bus_width = MMCSD_BUS_WIDTH_1;
mmcsd_set_iocfg(host);
}
/*
* To support SD 2.0 cards, we must always invoke SD_SEND_IF_COND
* before SD_APP_OP_COND. This command will harmlessly fail for
* SD 1.0 cards.
*/
rt_err_t mmcsd_send_if_cond(struct rt_mmcsd_host *host, rt_uint32_t ocr)
{
struct rt_mmcsd_cmd cmd;
rt_err_t err;
rt_uint8_t pattern;
cmd.cmd_code = SD_SEND_IF_COND;
cmd.arg = ((ocr & 0xFF8000) != 0) << 8 | 0xAA;
cmd.flags = RESP_SPI_R7 | RESP_R7 | CMD_BCR;
err = mmcsd_send_cmd(host, &cmd, 0);
if (err)
return err;
if (controller_is_spi(host))
pattern = cmd.resp[1] & 0xFF;
else
pattern = cmd.resp[0] & 0xFF;
if (pattern != 0xAA)
return -RT_ERROR;
return RT_EOK;
}
/*
* Starting point for SD card init.
*/
rt_int32_t init_sd(struct rt_mmcsd_host *host, rt_uint32_t ocr)
{
rt_int32_t err;
rt_uint32_t current_ocr;
/*
* We need to get OCR a different way for SPI.
*/
if (controller_is_spi(host))
{
mmcsd_go_idle(host);
err = mmcsd_spi_read_ocr(host, 0, &ocr);
if (err)
goto err;
}
if (ocr & VDD_165_195)
{
rt_kprintf(" SD card claims to support the "
"incompletely defined 'low voltage range'. This "
"will be ignored.\n");
ocr &= ~VDD_165_195;
}
current_ocr = mmcsd_select_voltage(host, ocr);
/*
* Can we support the voltage(s) of the card(s)?
*/
if (!current_ocr)
{
err = -RT_ERROR;
goto err;
}
/*
* Detect and init the card.
*/
err = mmcsd_sd_init_card(host, current_ocr);
if (err)
goto err;
mmcsd_host_unlock(host);
err = rt_mmcsd_blk_probe(host->card);
if (err)
goto remove_card;
mmcsd_host_lock(host);
return 0;
remove_card:
mmcsd_host_lock(host);
rt_mmcsd_blk_remove(host->card);
rt_free(host->card);
host->card = RT_NULL;
err:
rt_kprintf("init SD card failed\n");
return err;
}
static rt_int32_t mmcsd_sd_init_card(struct rt_mmcsd_host *host,
rt_uint32_t ocr)
{
struct rt_mmcsd_card *card;
rt_int32_t err;
rt_uint32_t resp[4];
rt_uint32_t max_data_rate;
mmcsd_go_idle(host);
/*
* If SD_SEND_IF_COND indicates an SD 2.0
* compliant card and we should set bit 30
* of the ocr to indicate that we can handle
* block-addressed SDHC cards.
*/
err = mmcsd_send_if_cond(host, ocr);
if (!err)
ocr |= 1 << 30;
err = mmcsd_send_app_op_cond(host, ocr, RT_NULL);
if (err)
goto err;
if (controller_is_spi(host))
err = mmcsd_get_cid(host, resp);
else
err = mmcsd_all_get_cid(host, resp);
if (err)
goto err;
card = rt_malloc(sizeof(struct rt_mmcsd_card));
if (!card)
{
rt_kprintf("malloc card failed\n");
err = -RT_ENOMEM;
goto err;
}
rt_memset(card, 0, sizeof(struct rt_mmcsd_card));
card->card_type = CARD_TYPE_SD;
card->host = host;
rt_memcpy(card->resp_cid, resp, sizeof(card->resp_cid));
/*
* For native busses: get card RCA and quit open drain mode.
*/
if (!controller_is_spi(host))
{
err = mmcsd_get_card_addr(host, &card->rca);
if (err)
goto err1;
mmcsd_set_bus_mode(host, MMCSD_BUSMODE_PUSHPULL);
}
err = mmcsd_get_csd(card, card->resp_csd);
if (err)
goto err1;
err = mmcsd_parse_csd(card);
if (err)
goto err1;
if (!controller_is_spi(host))
{
err = mmcsd_select_card(card);
if (err)
goto err1;
}
err = mmcsd_get_scr(card, card->resp_scr);
if (err)
goto err1;
mmcsd_parse_scr(card);
if (controller_is_spi(host))
{
err = mmcsd_spi_use_crc(host, 1);
if (err)
goto err1;
}
/*
* change SD card to high-speed, only SD2.0 spec
*/
err = mmcsd_switch(card);
if (err)
goto err1;
/* set bus speed */
max_data_rate = (unsigned int)-1;
if (card->flags & CARD_FLAG_HIGHSPEED)
{
if (max_data_rate > card->hs_max_data_rate)
max_data_rate = card->hs_max_data_rate;
}
else if (max_data_rate > card->max_data_rate)
{
max_data_rate = card->max_data_rate;
}
mmcsd_set_clock(host, max_data_rate);
/*switch bus width*/
if ((host->flags & MMCSD_BUSWIDTH_4) &&
(card->scr.sd_bus_widths & SD_SCR_BUS_WIDTH_4))
{
err = mmcsd_app_set_bus_width(card, MMCSD_BUS_WIDTH_4);
if (err)
goto err1;
mmcsd_set_bus_width(host, MMCSD_BUS_WIDTH_4);
}
host->card = card;
return 0;
err1:
rt_free(card);
err:
return err;
}
void mmcsd_set_data_timeout(struct rt_mmcsd_data *data, const struct rt_mmcsd_card *card)
{
rt_uint32_t mult;
if (card->card_type == CARD_TYPE_SDIO)
{
data->timeout_ns = 1000000000; /* SDIO card 1s */
data->timeout_clks = 0;
return;
}
/*
* SD cards use a 100 multiplier rather than 10
*/
mult = (card->card_type == CARD_TYPE_SD) ? 100 : 10;
/*
* Scale up the multiplier (and therefore the timeout) by
* the r2w factor for writes.
*/
if (data->flags & DATA_DIR_WRITE)
mult <<= card->csd.r2w_factor;
data->timeout_ns = card->tacc_ns * mult;
data->timeout_clks = card->tacc_clks * mult;
/*
* SD cards also have an upper limit on the timeout.
*/
if (card->card_type == CARD_TYPE_SD)
{
rt_uint32_t timeout_us, limit_us;
timeout_us = data->timeout_ns / 1000;
timeout_us += data->timeout_clks * 1000 /
(card->host->io_cfg.clock / 1000);
if (data->flags & DATA_DIR_WRITE)
/*
* The limit is really 250 ms, but that is
* insufficient for some crappy cards.
*/
limit_us = 300000;
else
limit_us = 100000;
/*
* SDHC cards always use these fixed values.
*/
if (timeout_us > limit_us || card->flags & CARD_FLAG_SDHC)
{
data->timeout_ns = limit_us * 1000; /* SDHC card fixed 250ms */
data->timeout_clks = 0;
}
}
if (controller_is_spi(card->host))
{
if (data->flags & DATA_DIR_WRITE)
{
if (data->timeout_ns < 1000000000)
data->timeout_ns = 1000000000; /* 1s */
}
else
{
if (data->timeout_ns < 100000000)
data->timeout_ns = 100000000; /* 100ms */
}
}
}
rt_int32_t mmcsd_get_csd(struct rt_mmcsd_card *card, rt_uint32_t *csd)
{
rt_int32_t err, i;
struct rt_mmcsd_req req;
struct rt_mmcsd_cmd cmd;
struct rt_mmcsd_data data;
rt_uint32_t *buf = RT_NULL;
if (!controller_is_spi(card->host))
{
rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
cmd.cmd_code = SEND_CSD;
cmd.arg = card->rca << 16;
cmd.flags = RESP_R2 | CMD_AC;
err = mmcsd_send_cmd(card->host, &cmd, 3);
if (err)
return err;
rt_memcpy(csd, cmd.resp, sizeof(rt_uint32_t) * 4);
return 0;
}
buf = (rt_uint32_t*)rt_malloc(16);
if (!buf)
{
rt_kprintf("allocate memory failed\n");
return -RT_ENOMEM;
}
rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
rt_memset(&data, 0, sizeof(struct rt_mmcsd_data));
req.cmd = &cmd;
req.data = &data;
cmd.cmd_code = SEND_CSD;
cmd.arg = 0;
/* NOTE HACK: the RESP_SPI_R1 is always correct here, but we
* rely on callers to never use this with "native" calls for reading
* CSD or CID. Native versions of those commands use the R2 type,
* not R1 plus a data block.
*/
cmd.flags = RESP_SPI_R1 | RESP_R1 | CMD_ADTC;
data.blksize = 16;
data.blks = 1;
data.flags = DATA_DIR_READ;
data.buf = buf;
/*
* The spec states that CSR and CID accesses have a timeout
* of 64 clock cycles.
*/
data.timeout_ns = 0;
data.timeout_clks = 64;
mmcsd_send_request(card->host, &req);
if (cmd.err || data.err)
{
rt_free(buf);
return -RT_ERROR;
}
for (i = 0;i < 4;i++)
csd[i] = buf[i];
rt_free(buf);
return 0;
}
