void omti8621_device::do_command(const UINT8 cdb[], const UINT16 cdb_length)
{
UINT8 lun = get_lun(cdb);
omti_disk_image_device *disk = our_disks[lun];
int command_duration = 0; // ms
log_command( cdb, cdb_length);
// default to read status and status is successful completion
omti_state = OMTI_STATE_STATUS;
status_port |= OMTI_STATUS_IO | OMTI_STATUS_CD;
command_status = lun ? OMTI_COMMAND_STATUS_LUN : 0;
if (mask_port & OMTI_MASK_INTE) {
set_interrupt(CLEAR_LINE);
}
if (!disk->m_image->exists()) {
command_status |= OMTI_COMMAND_STATUS_ERROR; // no such drive
}
switch (cdb[0]) {
case OMTI_CMD_TEST_DRIVE_READY: // 0x00
if (!disk->m_image->exists())
{
set_sense_data(OMTI_SENSE_CODE_DRIVE_NOT_READY, cdb);
}
break;
case OMTI_CMD_RECALIBRATE: // 0x01
break;
case OMTI_CMD_REQUEST_SENSE: // 0x03
set_data_transfer(sense_data, sizeof(sense_data));
break;
case OMTI_CMD_READ_VERIFY: // 0x05
check_disk_address(cdb);
break;
case OMTI_CMD_FORMAT_TRACK: // 0x06
format_track(cdb);
break;
case OMTI_CMD_FORMAT_BAD_TRACK: // 0x07
diskaddr_format_bad_track = get_disk_address(cdb);
break;
case OMTI_CMD_READ: // 0x08
if (check_disk_address(cdb)) {
// read data from controller
read_sectors_from_disk(get_disk_address(cdb), cdb[4], lun);
set_data_transfer(§or_buffer[0], OMTI_DISK_SECTOR_SIZE*cdb[4]);
}
break;
case OMTI_CMD_WRITE: // 0x0A
log_data();
if (check_disk_address(cdb)) {
write_sectors_to_disk(get_disk_address(cdb), cdb[4], lun);
}
break;
case OMTI_CMD_SEEK: // 0x0B
check_disk_address(cdb);
break;
case OMTI_CMD_READ_SECTOR_BUFFER: // 0x0E
set_data_transfer(§or_buffer[0], OMTI_DISK_SECTOR_SIZE*cdb[4]);
break;
case OMTI_CMD_WRITE_SECTOR_BUFFER: // 0x0F
log_data();
break;
case OMTI_CMD_COPY: // 0x20
if (check_disk_address(cdb) && check_disk_address(cdb+4)) {
// copy sectors
copy_sectors (get_disk_address(cdb+4), get_disk_address(cdb), cdb[4], lun);
}
break;
case OMTI_CMD_READ_ESDI_DEFECT_LIST: // 0x37
set_esdi_defect_list(get_lun(cdb), cdb[1] & 0x1f);
set_data_transfer(disk->m_esdi_defect_list, sizeof(disk->m_esdi_defect_list));
break;
#if 0 // this command seems unused by Domain/OS, and it's unclear what the intent of the code is (it makes some versions of GCC quite unhappy)
case OMTI_CMD_ASSIGN_ALTERNATE_TRACK: // 0x11
log_data();
alternate_track_address[0] = get_disk_track(cdb);
alternate_track_address[1] = get_disk_track(alternate_track_buffer-1);
break;
#endif
case OMTI_CMD_READ_DATA_TO_BUFFER: // 0x1E
if (check_disk_address(cdb)) {
// read data from controller
read_sectors_from_disk (get_disk_address(cdb), cdb[4], lun);
// Domain/OS doesn't expect zero access time
command_duration += 1; // 1 ms is enough, average time would be 30 ms)
}
break;
case OMTI_CMD_WRITE_DATA_FROM_BUFFER: // 0x1F
log_data();
if (check_disk_address(cdb)) {
write_sectors_to_disk(get_disk_address(cdb), cdb[4], lun);
}
break;
case OMTI_CMD_RAM_DIAGNOSTICS: // 0xE0
break;
case OMTI_CMD_CONTROLLER_INT_DIAGNOSTIC: // 0xE4
break;
case OMTI_CMD_READ_LONG: // 0xE5
if (check_disk_address(cdb)) {
// read data from controller
read_sectors_from_disk(get_disk_address(cdb), cdb[4], lun);
set_data_transfer(§or_buffer[0], OMTI_DISK_SECTOR_SIZE+6);
}
break;
case OMTI_CMD_WRITE_LONG: // 0xE6
log_data();
if (check_disk_address(cdb)) {
UINT32 diskaddr = get_disk_address(cdb);
write_sectors_to_disk(diskaddr, cdb[4], lun);
// this will spoil the ECC code
diskaddr_ecc_error = diskaddr;
}
break;
case OMTI_CMD_READ_CONFIGURATION: // 0xEC
set_configuration_data(get_lun(cdb));
set_data_transfer(disk->m_config_data, sizeof(disk->m_config_data));
break;
case OMTI_CMD_INVALID_COMMAND: // 0xFF
set_sense_data(OMTI_SENSE_CODE_INVALID_COMMAND, cdb);
command_status |= OMTI_COMMAND_STATUS_ERROR;
break;
default:
LOG(("do_command: UNEXPECTED command %02x",cdb[0]));
set_sense_data(OMTI_SENSE_CODE_INVALID_COMMAND, cdb);
command_status |= OMTI_COMMAND_STATUS_ERROR;
break;
}
if (mask_port & OMTI_MASK_INTE) {
// if (omti_state != OMTI_STATE_STATUS) {
// LOG(("do_command: UNEXPECTED omti_state %02x",omti_state));
// }
status_port |= OMTI_STATUS_IREQ;
if (command_duration == 0)
{
set_interrupt(ASSERT_LINE);
}
else
{
// FIXME: should delay omti_state and status_port as well
m_timer->adjust(attotime::from_msec(command_duration), 0);
}
}
}
static void do_command(omti8621_state *state,
const UINT8 cdb[], const UINT16 cdb_length) {
UINT8 lun = get_lun(cdb);
disk_data *disk = state->disk[lun];
int command_duration = 0; // ms
log_command( state, cdb, cdb_length);
// default to read status and status is successful completion
state->omti_state = OMTI_STATE_STATUS;
state->status_port |= OMTI_STATUS_IO | OMTI_STATUS_CD;
state->command_status = lun ? OMTI_COMMAND_STATUS_LUN : 0;
if (state->mask_port & OMTI_MASK_INTE) {
set_interrupt(state, CLEAR_LINE);
}
if (!disk->image->exists()) {
state->command_status |= OMTI_COMMAND_STATUS_ERROR; // no such drive
}
switch (cdb[0]) {
case OMTI_CMD_TEST_DRIVE_READY: // 0x00
if (!disk->image->exists())
{
set_sense_data(state, OMTI_SENSE_CODE_DRIVE_NOT_READY, cdb);
}
break;
case OMTI_CMD_RECALIBRATE: // 0x01
break;
case OMTI_CMD_REQUEST_SENSE: // 0x03
set_data_transfer(state, state->sense_data, sizeof(state->sense_data));
break;
case OMTI_CMD_READ_VERIFY: // 0x05
check_disk_address(state, cdb);
break;
case OMTI_CMD_FORMAT_TRACK: // 0x06
format_track(state, cdb);
break;
case OMTI_CMD_FORMAT_BAD_TRACK: // 0x07
state->diskaddr_format_bad_track = get_disk_address(state, cdb);
break;
case OMTI_CMD_READ: // 0x08
if (check_disk_address(state, cdb)) {
// read data from controller
read_sectors_from_disk(state, get_disk_address(state, cdb), cdb[4], lun);
set_data_transfer(state, state->sector_buffer, OMTI_DISK_SECTOR_SIZE*cdb[4]);
}
break;
case OMTI_CMD_WRITE: // 0x0A
log_data(state);
if (check_disk_address(state, cdb)) {
write_sectors_to_disk(state, get_disk_address(state, cdb), cdb[4], lun);
}
break;
case OMTI_CMD_SEEK: // 0x0B
check_disk_address(state, cdb);
break;
case OMTI_CMD_READ_SECTOR_BUFFER: // 0x0E
set_data_transfer(state, state->sector_buffer, OMTI_DISK_SECTOR_SIZE*cdb[4]);
break;
case OMTI_CMD_WRITE_SECTOR_BUFFER: // 0x0F
log_data(state);
break;
case OMTI_CMD_COPY: // 0x20
if (check_disk_address(state, cdb) && check_disk_address(state, cdb+4)) {
// copy sectors
copy_sectors (state, get_disk_address(state, cdb+4), get_disk_address(state, cdb), cdb[4], lun);
}
break;
case OMTI_CMD_READ_ESDI_DEFECT_LIST: // 0x37
set_esdi_defect_list(state, get_lun(cdb), cdb[1] & 0x1f);
set_data_transfer(state, disk->esdi_defect_list, sizeof(disk->esdi_defect_list));
break;
case OMTI_CMD_ASSIGN_ALTERNATE_TRACK: // 0x11
log_data(state);
state->alternate_track_address[0] = get_disk_track(state, cdb);
state->alternate_track_address[1] = get_disk_track(state, state->alternate_track_buffer-1);;
break;
case OMTI_CMD_READ_DATA_TO_BUFFER: // 0x1E
if (check_disk_address(state, cdb)) {
// read data from controller
read_sectors_from_disk (state, get_disk_address(state, cdb), cdb[4], lun);
// Domain/OS doesn't expect zero access time
command_duration += 1; // 1 ms is enough, average time would be 30 ms)
}
break;
case OMTI_CMD_WRITE_DATA_FROM_BUFFER: // 0x1F
log_data(state);
if (check_disk_address(state, cdb)) {
write_sectors_to_disk(state, get_disk_address(state, cdb), cdb[4], lun);
}
break;
case OMTI_CMD_RAM_DIAGNOSTICS: // 0xE0
break;
case OMTI_CMD_CONTROLLER_INT_DIAGNOSTIC: // 0xE4
break;
case OMTI_CMD_READ_LONG: // 0xE5
if (check_disk_address(state, cdb)) {
// read data from controller
read_sectors_from_disk(state, get_disk_address(state, cdb), cdb[4], lun);
set_data_transfer(state, state->sector_buffer, OMTI_DISK_SECTOR_SIZE+6);
}
break;
case OMTI_CMD_WRITE_LONG: // 0xE6
log_data(state);
if (check_disk_address(state, cdb)) {
UINT32 diskaddr = get_disk_address(state, cdb);
write_sectors_to_disk(state, diskaddr, cdb[4], lun);
// this will spoil the ECC code
state->diskaddr_ecc_error = diskaddr;
}
break;
case OMTI_CMD_READ_CONFIGURATION: // 0xEC
set_configuration_data(state, get_lun(cdb));
set_data_transfer(state, disk->config_data, sizeof(disk->config_data));
break;
case OMTI_CMD_INVALID_COMMAND: // 0xFF
set_sense_data(state, OMTI_SENSE_CODE_INVALID_COMMAND, cdb);
state->command_status |= OMTI_COMMAND_STATUS_ERROR;
break;
default:
LOG(("do_command: UNEXPECTED command %02x",cdb[0]));
set_sense_data(state, OMTI_SENSE_CODE_INVALID_COMMAND, cdb);
state->command_status |= OMTI_COMMAND_STATUS_ERROR;
break;
}
if (state->mask_port & OMTI_MASK_INTE) {
// if (state->omti_state != OMTI_STATE_STATUS) {
// LOG(("do_command: UNEXPECTED omti_state %02x",state->omti_state));
// }
state->status_port |= OMTI_STATUS_IREQ;
if (command_duration == 0) {
set_interrupt(state, ASSERT_LINE);
} else {
// FIXME: should delay state->omti_state and state->status_port as well
state->device->machine().scheduler().timer_set(attotime::from_msec(command_duration), FUNC(set_interrupt_caba), 0, state);
}
}
}
