static void report_cpu_info(void) { struct cpuid_result cpuidr; u32 i, index, cpu_id, cpu_feature_flag; char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */ int vt, txt, aes; msr_t microcode_ver; static const char *const mode[] = {"NOT ", ""}; const char *cpu_type = "Unknown"; u32 p[13]; index = 0x80000000; cpuidr = cpuid(index); if (cpuidr.eax < 0x80000004) { strcpy(cpu_string, "Platform info not available"); } else { int j=0; for (i = 2; i <= 4; i++) { cpuidr = cpuid(index + i); p[j++] = cpuidr.eax; p[j++] = cpuidr.ebx; p[j++] = cpuidr.ecx; p[j++] = cpuidr.edx; } p[12]=0; cpu_name = (char *)p; } /* Skip leading spaces in CPU name string */ while (cpu_name[0] == ' ') cpu_name++; microcode_ver.lo = 0; microcode_ver.hi = 0; wrmsr(BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); microcode_ver = rdmsr(BIOS_SIGN_ID); /* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { if (cpu_table[i].cpuid == cpu_id) { cpu_type = cpu_table[i].name; break; } } printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", cpu_id, cpu_type, microcode_ver.hi); cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; txt = (cpu_feature_flag & CPUID_SMX) ? 1 : 0; vt = (cpu_feature_flag & CPUID_VMX) ? 1 : 0; printk(BIOS_DEBUG, "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n", mode[aes], mode[txt], mode[vt]); }
static void configure_dca_cap(void) { uint32_t feature_flag; msr_t msr; /* Check feature flag in CPUID.(EAX=1):ECX[18]==1 */ feature_flag = cpu_get_feature_flags_ecx(); if (feature_flag & CPUID_DCA) { msr = rdmsr(IA32_PLATFORM_DCA_CAP); msr.lo |= 1; wrmsr(IA32_PLATFORM_DCA_CAP, msr); } }