static int put_sr(QEMUFile *f, void *opaque, size_t size,
VMStateField *field, QJSON *vmdesc)
{
CPUOpenRISCState *env = opaque;
qemu_put_be32(f, cpu_get_sr(env));
return 0;
}
int openrisc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
{
OpenRISCCPU *cpu = OPENRISC_CPU(cs);
CPUOpenRISCState *env = &cpu->env;
if (n < 32) {
return gdb_get_reg32(mem_buf, env->gpr[n]);
} else {
switch (n) {
case 32: /* PPC */
return gdb_get_reg32(mem_buf, env->ppc);
case 33: /* NPC (equals PC) */
return gdb_get_reg32(mem_buf, env->pc);
case 34: /* SR */
return gdb_get_reg32(mem_buf, cpu_get_sr(env));
default:
break;
}
}
return 0;
}
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS WITH THE SOFTWARE.
*/
#include "cpu.h"
void cpu_reset(struct CPU *cpu)
_(requires \thread_local(cpu))
_(requires \wrapped(cpu))
_(ensures \wrapped(cpu))
_(ensures cpu_get_maclo(cpu) == 0)
_(ensures cpu_get_machi(cpu) == 0)
_(ensures cpu_get_pc(cpu) == 0x100)
_(ensures cpu_get_npc(cpu) == cpu_get_pc(cpu) + 4)
_(ensures cpu_get_sr(cpu) == 0x00008001)
_(writes cpu)
{
_(unwrap cpu)
_(unwrap cpu->regs)
int idx;
for(idx = 0; idx < NUM_REGS; idx++)
_(writes \array_range(cpu->regs->gpr, NUM_REGS))
_(invariant \forall int i; (i >= 0 && i < idx) ==> cpu->regs->gpr[i] == 0)
{
cpu_set_gpr(cpu, idx, 0);
}
_(assert \forall u32 i; i<NUM_REGS ==> cpu->regs->gpr[i] == 0)
cpu_set_sr(cpu, 0x00008001);
cpu_set_maclo(cpu, 0);
cpu_set_machi(cpu, 0);
