void __init msm7x25a_kgsl_3d0_init(void) { if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) { kgsl_3d0_pdata.pwr_data.pwrlevel[0].gpu_freq = 133330000; kgsl_3d0_pdata.pwr_data.pwrlevel[0].bus_freq = 160000000; kgsl_3d0_pdata.pwr_data.pwrlevel[1].gpu_freq = 96000000; kgsl_3d0_pdata.pwr_data.pwrlevel[1].bus_freq = 0; } }
void __init msm7x25a_kgsl_3d0_init(void) { if (cpu_is_msm7x25a() || cpu_is_msm7x25aa() || cpu_is_msm7x25ab()) { kgsl_3d0_pdata.num_levels = 2; kgsl_3d0_pdata.pwrlevel[0].gpu_freq = 220000000; kgsl_3d0_pdata.pwrlevel[0].bus_freq = 200000000; kgsl_3d0_pdata.pwrlevel[1].gpu_freq = 133330000; kgsl_3d0_pdata.pwrlevel[1].bus_freq = 0; } }
static int msm_fb_get_lane_config(void) { int rc = DSI_TWO_LANES; #if 0 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) { rc = DSI_SINGLE_LANE; pr_info("DSI Single Lane\n"); } else { pr_info("DSI Two Lanes\n"); } #endif return rc; }
/* * Configure hardware registers in preparation for SWFI. */ static void msm_pm_config_hw_before_swfi(void) { if (cpu_is_qsd8x50()) { __raw_writel(0x1f, APPS_CLK_SLEEP_EN); mb(); } else if (cpu_is_msm7x27()) { __raw_writel(0x0f, APPS_CLK_SLEEP_EN); mb(); } else if (cpu_is_msm7x27a() || cpu_is_msm7x27aa() || cpu_is_msm7x25a() || cpu_is_msm7x25aa() || cpu_is_msm7x25ab()) { __raw_writel(0x7, APPS_CLK_SLEEP_EN); mb(); } }
static void __init msm7627a_clock_pre_init(void) { int size = ARRAY_SIZE(msm_cmn_clk_7625a_7627a); msm_shared_pll_control_init(); memcpy(&msm_clk_7627a_7625a, &msm_cmn_clk_7625a_7627a, sizeof(msm_cmn_clk_7625a_7627a)); if (!cpu_is_msm7x25a()) { memcpy(&msm_clk_7627a_7625a[size], &msm_clk_7627a, sizeof(msm_clk_7627a)); size += ARRAY_SIZE(msm_clk_7627a); } msm7x27a_clock_init_data.size = size; }
static void __init msm7627a_clock_pre_init_except_uart3(void) { int size = ARRAY_SIZE(msm_cmn_clk_7625a_7627a_except_uart3); /* Intialize shared PLL control structure */ msm_shared_pll_control_init(); memcpy(&msm_clk_7627a_7625a_except_uart3, &msm_cmn_clk_7625a_7627a_except_uart3, sizeof(msm_cmn_clk_7625a_7627a_except_uart3)); if (!cpu_is_msm7x25a()) { memcpy(&msm_clk_7627a_7625a_except_uart3[size], &msm_clk_7627a, sizeof(msm_clk_7627a)); size += ARRAY_SIZE(msm_clk_7627a); } msm7x27a_clock_init_data_except_uart3.size = size; }
/* * Configure hardware registers in preparation for Apps power down. */ static void msm_pm_config_hw_before_power_down(void) { if (cpu_is_msm7x30() || cpu_is_msm8x55()) { __raw_writel(4, APPS_SECOP); } else if (cpu_is_msm7x27()) { __raw_writel(0x1f, APPS_CLK_SLEEP_EN); } else if (cpu_is_msm7x27a() || cpu_is_msm7x27aa() || cpu_is_msm7x25a() || cpu_is_msm7x25aa() || cpu_is_msm7x25ab()) { __raw_writel(0x7, APPS_CLK_SLEEP_EN); } else if (cpu_is_qsd8x50()) { __raw_writel(0x1f, APPS_CLK_SLEEP_EN); mb(); __raw_writel(0, APPS_STANDBY_CTL); } mb(); __raw_writel(1, APPS_PWRDOWN); mb(); }