C++ (Cpp) dc_compute_interrupt_level示例

示例#1

文件： dc.c 项目： nitrologic/emu

void dc_update_interrupt_status(running_machine *machine)
{
int level;

	if (dc_sysctrl_regs[SB_ISTERR])
	{
		dc_sysctrl_regs[SB_ISTNRM] |= IST_ERROR;
	}
	else
	{
		dc_sysctrl_regs[SB_ISTNRM] &= ~IST_ERROR;
	}

	if (dc_sysctrl_regs[SB_ISTEXT])
	{
		dc_sysctrl_regs[SB_ISTNRM] |= IST_G1G2EXTSTAT;
	}
	else
	{
		dc_sysctrl_regs[SB_ISTNRM] &= ~IST_G1G2EXTSTAT;
	}

	level=dc_compute_interrupt_level(machine);
	sh4_set_irln_input(cputag_get_cpu(machine, "maincpu"), 15-level);
}

示例#2

文件： dc.cpp 项目： bradhugh/mame

void dc_state::dc_update_interrupt_status()
{
	int level;

	if (dc_sysctrl_regs[SB_ISTERR])
	{
		dc_sysctrl_regs[SB_ISTNRM] |= IST_ERROR;
	}
	else
	{
		dc_sysctrl_regs[SB_ISTNRM] &= ~IST_ERROR;
	}

	if (dc_sysctrl_regs[SB_ISTEXT])
	{
		dc_sysctrl_regs[SB_ISTNRM] |= IST_G1G2EXTSTAT;
	}
	else
	{
		dc_sysctrl_regs[SB_ISTNRM] &= ~IST_G1G2EXTSTAT;
	}

	level=dc_compute_interrupt_level();
	m_maincpu->sh4_set_irln_input(15-level);

	/* Wave DMA HW trigger */
	for (int i = 0; i < 4; i++)
	{
		if (m_g2_dma[i].flag && ((m_g2_dma[i].sel & 2) == 2))
		{
			if ((dc_sysctrl_regs[SB_G2DTNRM] & dc_sysctrl_regs[SB_ISTNRM]) || (dc_sysctrl_regs[SB_G2DTEXT] & dc_sysctrl_regs[SB_ISTEXT]))
			{
				address_space &space = m_maincpu->space(AS_PROGRAM);

				printf("Wave DMA HW trigger\n");
				g2_dma_execute(space, i);
			}
		}
	}

	/* PVR-DMA HW trigger */
	if(m_powervr2->m_pvr_dma.flag && ((m_powervr2->m_pvr_dma.sel & 1) == 1))
	{
		if((dc_sysctrl_regs[SB_PDTNRM] & dc_sysctrl_regs[SB_ISTNRM]) || (dc_sysctrl_regs[SB_PDTEXT] & dc_sysctrl_regs[SB_ISTEXT]))
		{
			address_space &space = m_maincpu->space(AS_PROGRAM);

			printf("PVR-DMA HW trigger\n");
			m_powervr2->pvr_dma_execute(space);
		}
	}
}

示例#3

文件： dc.c 项目： j4y4r/j4ymame

void dc_update_interrupt_status(running_machine &machine)
{
	dc_state *state = machine.driver_data<dc_state>();
	int level;

	if (state->dc_sysctrl_regs[SB_ISTERR])
	{
		state->dc_sysctrl_regs[SB_ISTNRM] |= IST_ERROR;
	}
	else
	{
		state->dc_sysctrl_regs[SB_ISTNRM] &= ~IST_ERROR;
	}

	if (state->dc_sysctrl_regs[SB_ISTEXT])
	{
		state->dc_sysctrl_regs[SB_ISTNRM] |= IST_G1G2EXTSTAT;
	}
	else
	{
		state->dc_sysctrl_regs[SB_ISTNRM] &= ~IST_G1G2EXTSTAT;
	}

	level=dc_compute_interrupt_level(machine);
	sh4_set_irln_input(machine.device("maincpu"), 15-level);

	/* Wave DMA HW trigger */
	if(state->m_wave_dma.flag && ((state->m_wave_dma.sel & 2) == 2))
	{
		if((state->dc_sysctrl_regs[SB_G2DTNRM] & state->dc_sysctrl_regs[SB_ISTNRM]) || (state->dc_sysctrl_regs[SB_G2DTEXT] & state->dc_sysctrl_regs[SB_ISTEXT]))
		{
			address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);

			printf("Wave DMA HW trigger\n");
			wave_dma_execute(space);
		}
	}

	/* PVR-DMA HW trigger */
	if(state->m_pvr_dma.flag && ((state->m_pvr_dma.sel & 1) == 1))
	{
		if((state->dc_sysctrl_regs[SB_PDTNRM] & state->dc_sysctrl_regs[SB_ISTNRM]) || (state->dc_sysctrl_regs[SB_PDTEXT] & state->dc_sysctrl_regs[SB_ISTEXT]))
		{
			address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);

			printf("PVR-DMA HW trigger\n");
			pvr_dma_execute(space);
		}
	}
}