示例#1
0
文件: mt_dcm.c 项目: SelfImp/m75
static ssize_t dcm_state_store(struct kobject *kobj, struct kobj_attribute *attr,const char *buf, size_t n)
{
    char cmd[10];
    unsigned int mask;

    if (sscanf(buf, "%s %x", cmd, &mask) == 2) {
        mask &= ALL_DCM;

        /*
		Need to enable MM clock before setting Smi_secure register
		to avoid system crash while screen is off(screen off with USB cable)
		*/
        enable_mux(MT_MUX_MM, "DCM");

        if (!strcmp(cmd, "enable")) {
            dcm_dump_regs(mask);
            dcm_enable(mask);
            dcm_dump_regs(mask);
        } else if (!strcmp(cmd, "disable")) {
            dcm_dump_regs(mask);
            dcm_disable(mask);
            dcm_dump_regs(mask);
        } else if (!strcmp(cmd, "dump")) {
            dcm_dump_regs(mask);
        }

	    disable_mux(MT_MUX_MM, "DCM");

        return n;
    }

    return -EINVAL;
}
示例#2
0
文件: mt_dcm.c 项目: SelfImp/m75
void mt_dcm_init(void)
{
    int err = 0;

    dcm_info("[%s]entry!!,ALL_DCM=%d\n", __func__,ALL_DCM);
    dcm_enable(ALL_DCM);
    //dcm_enable(ALL_DCM & (~IFR_DCM));

    err = sysfs_create_file(power_kobj, &dcm_state_attr.attr);

    if (err) {
        dcm_err("[%s]: fail to create sysfs\n", __func__);
    }
}
示例#3
0
static ssize_t dcm_state_store(struct kobject *kobj, struct kobj_attribute *attr,const char *buf, size_t n)
{
    char cmd[16];
    unsigned int mask;

    if (sscanf(buf, "%15s %x", cmd, &mask) == 2) {
        mask &= ALL_DCM;
        if (!strcmp(cmd, "enable")) {
            dcm_dump_regs(mask);
            dcm_enable(mask);
            dcm_dump_regs(mask);
        } else if (!strcmp(cmd, "disable")) {
            dcm_dump_regs(mask);
            dcm_disable(mask);
            dcm_dump_regs(mask);
        } else if (!strcmp(cmd, "dump")) {
            dcm_dump_regs(mask);
        }
        return n;
    }
    
    return -EINVAL;
}
示例#4
0
void power_saving_init(void)
{
    unsigned int reg_val = 0;
    
    dcm_enable();
    
    /* Power Controlled by SW */
    DRV_SetReg32(SC_PWR_CON5, (0x1 << PWR_CTRL));
    
    /* pull up PWR_ISO */
    DRV_SetReg32(SC_PWR_CON5, (0x1 << PWR_ISO));
    
    /* pull down PWR_RST_B, pull up PWR_MEM_OFF and PWR_CLK_DIS */
    reg_val = DRV_Reg32(SC_PWR_CON5);
    reg_val = (reg_val & ~(0x1 << PWR_RST_B)) | (0x1 << PWR_MEM_OFF) | (0x1 << PWR_CLK_DIS);
    DRV_WriteReg32(SC_PWR_CON5, reg_val);
    
    /* pull down PWR_ON */
    DRV_ClrReg32(SC_PWR_CON5, (0x1 << PWR_ON));
    
    /* wait for PWR_STA update */
    while ((DRV_Reg32(SC_PWR_STA) & (0x1 << MM2_SUBSYS))) {
    }
}
示例#5
0
void dcm_enable_all(void)
{
    dcm_enable(ALL_DCM);
}