void mem_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
struct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC;
struct atmel_mpddrc_config ddrc_config;
u32 reg;
ddrc_conf(&ddrc_config);
at91_periph_clk_enable(ATMEL_ID_MPDDRC);
writel(AT91_PMC_DDR, &pmc->scer);
reg = readl(&mpddrc->io_calibr);
reg &= ~ATMEL_MPDDRC_IO_CALIBR_RDIV;
reg |= ATMEL_MPDDRC_IO_CALIBR_DDR3_RZQ_55;
reg &= ~ATMEL_MPDDRC_IO_CALIBR_TZQIO;
reg |= ATMEL_MPDDRC_IO_CALIBR_TZQIO_(100);
writel(reg, &mpddrc->io_calibr);
writel(ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_TWO_CYCLE,
&mpddrc->rd_data_path);
ddr3_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config);
writel(0x3, &mpddrc->cal_mr4);
writel(64, &mpddrc->tim_cal);
}
void board_init_f(ulong dummy)
{
/* Set global data pointer */
gd = &gdata;
/* Linux expects the internal registers to be at 0xf1000000 */
arch_cpu_init();
/*
* Pin muxing needs to be done before UART output, since
* on A38x the UART pins need some re-muxing for output
* to work.
*/
board_early_init_f();
preloader_console_init();
timer_init();
/* First init the serdes PHY's */
serdes_phy_config();
/* Setup DDR */
ddr3_init();
board_init_r(NULL, 0);
}
void board_init_f(ulong dummy)
{
int ret;
/*
* Pin muxing needs to be done before UART output, since
* on A38x the UART pins need some re-muxing for output
* to work.
*/
board_early_init_f();
/* Example code showing how to enable the debug UART on MVEBU */
#ifdef EARLY_UART
/*
* Debug UART can be used from here if required:
*
* debug_uart_init();
* printch('a');
* printhex8(0x1234);
* printascii("string");
*/
#endif
ret = spl_init();
if (ret) {
debug("spl_init() failed: %d\n", ret);
hang();
}
/* Use special translation offset for SPL */
dm_set_translation_offset(0xd0000000 - 0xf1000000);
preloader_console_init();
timer_init();
/* Armada 375 does not support SerDes and DDR3 init yet */
#if !defined(CONFIG_ARMADA_375)
/* First init the serdes PHY's */
serdes_phy_config();
/* Setup DDR */
ddr3_init();
#endif
/*
* Return to the BootROM to continue the Marvell xmodem
* UART boot protocol. As initiated by the kwboot tool.
*
* This can only be done by the BootROM and not by the
* U-Boot SPL infrastructure, since the beginning of the
* image is already read and interpreted by the BootROM.
* SPL has no chance to receive this information. So we
* need to return to the BootROM to enable this xmodem
* UART download.
*/
if (get_boot_device() == BOOT_DEVICE_UART)
return_to_bootrom();
}
int dram_init(void)
{
u32 ddr3_size;
ddr3_size = ddr3_init();
gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
#if defined(CONFIG_TI_AEMIF)
if (!board_is_k2g_ice())
aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
#endif
if (!board_is_k2g_ice()) {
if (ddr3_size)
ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
else
ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE,
gd->ram_size >> 30);
}
return 0;
}
