void dram_write(hwaddr_t addr, size_t len, uint32_t data) { uint32_t offset = addr & BURST_MASK; uint8_t temp[2 * BURST_LEN]; uint8_t mask[2 * BURST_LEN]; memset(mask, 0, 2 * BURST_LEN); *(uint32_t *)(temp + offset) = data; memset(mask + offset, 1, len); ddr3_write(addr, temp, mask); if(offset + len > BURST_LEN) { /* data cross the burst boundary */ ddr3_write(addr + BURST_LEN, temp + BURST_LEN, mask + BURST_LEN); } }
void dram_write(hwaddr_t addr, size_t len, uint32_t data) { #ifdef O1 switch (len) { case 1 : unalign_rw (hw_mem + addr, 1) = data; break; case 2 : unalign_rw (hw_mem + addr, 2) = data; break; case 4 : unalign_rw (hw_mem + addr, 4) = data; } #else uint32_t offset = addr & BURST_MASK; uint8_t temp[2 * BURST_LEN]; uint8_t mask[2 * BURST_LEN]; memset(mask, 0, 2 * BURST_LEN); *(uint32_t *)(temp + offset) = data; memset(mask + offset, 1, len); ddr3_write(addr, temp, mask); if(offset + len > BURST_LEN) { /* data cross the burst boundary */ ddr3_write(addr + BURST_LEN, temp + BURST_LEN, mask + BURST_LEN); } #endif }