static int flexcop_pci_write_ibi_reg(struct flexcop_device *fc, flexcop_ibi_register r, flexcop_ibi_value v) { struct flexcop_pci *fc_pci = fc->bus_specific; if (lastwreg != r || lastwval != v.raw) { lastwreg = r; lastwval = v.raw; deb_reg("new wr: %3x: %08x\n",r,v.raw); } writel(v.raw, fc_pci->io_mem + r); return 0; }
int mxl111sf_write_reg(struct mxl111sf_state *state, u8 addr, u8 data) { u8 buf[] = { addr, data }; int ret; deb_reg("W: (0x%02x, 0x%02x)\n", addr, data); ret = mxl111sf_ctrl_msg(state->d, MXL_CMD_REG_WRITE, buf, 2, NULL, 0); if (mxl_fail(ret)) err("error writing reg: 0x%02x, val: 0x%02x", addr, data); return ret; }
static flexcop_ibi_value flexcop_pci_read_ibi_reg (struct flexcop_device *fc, flexcop_ibi_register r) { struct flexcop_pci *fc_pci = fc->bus_specific; flexcop_ibi_value v; v.raw = readl(fc_pci->io_mem + r); if (lastrreg != r || lastrval != v.raw) { lastrreg = r; lastrval = v.raw; deb_reg("new rd: %3x: %08x\n",r,v.raw); } return v; }
int mxl111sf_read_reg(struct mxl111sf_state *state, u8 addr, u8 *data) { u8 buf[2]; int ret; ret = mxl111sf_ctrl_msg(state->d, MXL_CMD_REG_READ, &addr, 1, buf, 2); if (mxl_fail(ret)) { mxl_debug("error reading reg: 0x%02x", addr); goto fail; } if (buf[0] == addr) *data = buf[1]; else { err("invalid response reading reg: 0x%02x != 0x%02x, 0x%02x", addr, buf[0], buf[1]); ret = -EINVAL; } deb_reg("R: (0x%02x, 0x%02x)\n", addr, *data); fail: return ret; }