static int __devinit mdss_dsi_ctrl_probe(struct platform_device *pdev)
{
int rc = 0;
u32 index;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
struct device_node *dsi_pan_node = NULL;
char panel_cfg[MDSS_MAX_PANEL_LEN];
struct resource *mdss_dsi_mres;
const char *ctrl_name;
bool cmd_cfg_cont_splash = true;
if (!mdss_is_ready()) {
pr_err("%s: MDP not probed yet!\n", __func__);
return -EPROBE_DEFER;
}
if (!pdev->dev.of_node) {
pr_err("DSI driver only supports device tree probe\n");
return -ENOTSUPP;
}
ctrl_pdata = platform_get_drvdata(pdev);
if (!ctrl_pdata) {
ctrl_pdata = devm_kzalloc(&pdev->dev,
sizeof(struct mdss_dsi_ctrl_pdata),
GFP_KERNEL);
if (!ctrl_pdata) {
pr_err("%s: FAILED: cannot alloc dsi ctrl\n",
__func__);
rc = -ENOMEM;
goto error_no_mem;
}
platform_set_drvdata(pdev, ctrl_pdata);
}
ctrl_name = of_get_property(pdev->dev.of_node, "label", NULL);
if (!ctrl_name)
pr_info("%s:%d, DSI Ctrl name not specified\n",
__func__, __LINE__);
else
pr_info("%s: DSI Ctrl name = %s\n",
__func__, ctrl_name);
rc = of_property_read_u32(pdev->dev.of_node,
"cell-index", &index);
if (rc) {
dev_err(&pdev->dev,
"%s: Cell-index not specified, rc=%d\n",
__func__, rc);
goto error_no_mem;
}
if (index == 0)
pdev->id = 1;
else
pdev->id = 2;
mdss_dsi_mres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!mdss_dsi_mres) {
pr_err("%s:%d unable to get the MDSS resources",
__func__, __LINE__);
rc = -ENOMEM;
goto error_no_mem;
}
mdss_dsi_base = ioremap(mdss_dsi_mres->start,
resource_size(mdss_dsi_mres));
if (!mdss_dsi_base) {
pr_err("%s:%d unable to remap dsi resources",
__func__, __LINE__);
rc = -ENOMEM;
goto error_no_mem;
}
rc = of_platform_populate(pdev->dev.of_node,
NULL, NULL, &pdev->dev);
if (rc) {
dev_err(&pdev->dev,
"%s: failed to add child nodes, rc=%d\n",
__func__, rc);
goto error_ioremap;
}
/* Parse the regulator information */
rc = mdss_dsi_get_dt_vreg_data(&pdev->dev,
&ctrl_pdata->power_data);
if (rc) {
pr_err("%s: failed to get vreg data from dt. rc=%d\n",
__func__, rc);
goto error_vreg;
}
/* DSI panels can be different between controllers */
rc = mdss_dsi_get_panel_cfg(panel_cfg);
if (!rc)
/* dsi panel cfg not present */
pr_warn("%s:%d:dsi specific cfg not present\n",
__func__, __LINE__);
/* find panel device node */
dsi_pan_node = mdss_dsi_find_panel_of_node(pdev, panel_cfg);
if (!dsi_pan_node) {
pr_err("%s: can't find panel node %s\n", __func__, panel_cfg);
goto error_pan_node;
}
cmd_cfg_cont_splash = mdss_panel_get_boot_cfg() ? true : false;
rc = mdss_dsi_panel_init(dsi_pan_node, ctrl_pdata, cmd_cfg_cont_splash);
if (rc) {
pr_err("%s: dsi panel init failed\n", __func__);
goto error_pan_node;
}
rc = dsi_panel_device_register(dsi_pan_node, ctrl_pdata);
if (rc) {
pr_err("%s: dsi panel dev reg failed\n", __func__);
goto error_pan_node;
}
#ifdef CONFIG_ZTEMT_LCD_ESD_TE_CHECK
/*esd check faild check,mayu add*/
//printk("lcd:%s disp_te_gpio=%d\n",__func__,ctrl_pdata->disp_te_gpio);
ctrl_pdata->lcd_te_irq = gpio_to_irq(ctrl_pdata->disp_te_gpio);
rc = request_irq(ctrl_pdata->lcd_te_irq, zte_lcd_te_irq_handler, \
IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING, "LCD_TE", ctrl_pdata);
if (rc < 0) {
printk("lcd:%s : request_irq failed\n", __func__);
}
#endif
pr_debug("%s: Dsi Ctrl->%d initialized\n", __func__, index);
return 0;
error_pan_node:
of_node_put(dsi_pan_node);
error_vreg:
mdss_dsi_put_dt_vreg_data(&pdev->dev, &ctrl_pdata->power_data);
error_ioremap:
iounmap(mdss_dsi_base);
error_no_mem:
devm_kfree(&pdev->dev, ctrl_pdata);
return rc;
}
static int wm831x_backlight_probe(struct platform_device *pdev)
{
struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
struct wm831x_pdata *wm831x_pdata;
struct wm831x_backlight_pdata *pdata;
struct wm831x_backlight_data *data;
struct backlight_device *bl;
int ret, i, max_isel, isink_reg, dcdc_cfg;
/* We need platform data */
if (pdev->dev.parent->platform_data) {
wm831x_pdata = pdev->dev.parent->platform_data;
pdata = wm831x_pdata->backlight;
} else {
pdata = NULL;
}
if (!pdata) {
dev_err(&pdev->dev, "No platform data supplied\n");
return -EINVAL;
}
/* Figure out the maximum current we can use */
for (i = 0; i < WM831X_ISINK_MAX_ISEL; i++) {
if (wm831x_isinkv_values[i] > pdata->max_uA)
break;
}
if (i == 0) {
dev_err(&pdev->dev, "Invalid max_uA: %duA\n", pdata->max_uA);
return -EINVAL;
}
max_isel = i - 1;
if (pdata->max_uA != wm831x_isinkv_values[max_isel])
dev_warn(&pdev->dev,
"Maximum current is %duA not %duA as requested\n",
wm831x_isinkv_values[max_isel], pdata->max_uA);
switch (pdata->isink) {
case 1:
isink_reg = WM831X_CURRENT_SINK_1;
dcdc_cfg = 0;
break;
case 2:
isink_reg = WM831X_CURRENT_SINK_2;
dcdc_cfg = WM831X_DC4_FBSRC;
break;
default:
dev_err(&pdev->dev, "Invalid ISINK %d\n", pdata->isink);
return -EINVAL;
}
/* Configure the ISINK to use for feedback */
ret = wm831x_reg_unlock(wm831x);
if (ret < 0)
return ret;
ret = wm831x_set_bits(wm831x, WM831X_DC4_CONTROL, WM831X_DC4_FBSRC,
dcdc_cfg);
wm831x_reg_lock(wm831x);
if (ret < 0)
return ret;
data = kzalloc(sizeof(*data), GFP_KERNEL);
if (data == NULL)
return -ENOMEM;
data->wm831x = wm831x;
data->current_brightness = 0;
data->isink_reg = isink_reg;
bl = backlight_device_register("wm831x", &pdev->dev,
data, &wm831x_backlight_ops);
if (IS_ERR(bl)) {
dev_err(&pdev->dev, "failed to register backlight\n");
kfree(data);
return PTR_ERR(bl);
}
bl->props.max_brightness = max_isel;
bl->props.brightness = max_isel;
platform_set_drvdata(pdev, bl);
/* Disable the DCDC if it was started so we can bootstrap */
wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, WM831X_DC4_ENA, 0);
backlight_update_status(bl);
return 0;
}
int diag_bridge_write(char *data, int size)
{
struct urb *urb = NULL;
unsigned int pipe;
struct diag_bridge *dev = __dev;
struct usb_device *udev;
int ret;
int spin;
if (!dev || !dev->udev)
return -ENODEV;
if (!size) {
dev_err(&dev->udev->dev, "invalid size:%d\n", size);
return -EINVAL;
}
if (!dev->ifc) {
dev_err(&dev->udev->dev, "device is disconnected\n");
return -ENODEV;
}
/* if there was a previous unrecoverable error, just quit */
if (dev->err)
return -ESHUTDOWN;
spin = 50;
while (check_request_blocked(rmnet_pm_dev) && spin--) {
pr_info("%s: wake up wait loop\n", __func__);
msleep(20);
}
if (check_request_blocked(rmnet_pm_dev)) {
pr_err("%s: in lpa wakeup, return EAGAIN\n", __func__);
return -EAGAIN;
}
urb = usb_alloc_urb(0, GFP_KERNEL);
if (!urb) {
err("unable to allocate urb");
return -ENOMEM;
}
udev = interface_to_usbdev(dev->ifc);
/* if dev handling suspend wait for suspended or active*/
if (pm_dev_runtime_get_enabled(udev) < 0) {
usb_free_urb(urb);
return -EAGAIN;
}
ret = usb_autopm_get_interface(dev->ifc);
if (ret < 0) {
dev_err(&dev->udev->dev, "autopm_get failed:%d\n", ret);
usb_free_urb(urb);
return ret;
}
if (size == 4 || size == 5) {
if (data[0] == 0x1d && data[1] == 0x1c && data[2] == 0x3b)
pr_info("%s: diag.cfg [send start]\n", __func__);
else if (data[0] == 0x60 && data[1] == 0x00 &&
data[2] == 0x12 && data[3] == 0x6a)
pr_info("%s: diag.cfg [send complete]\n", __func__);
}
pipe = usb_sndbulkpipe(dev->udev, dev->out_epAddr);
usb_fill_bulk_urb(urb, dev->udev, pipe, data, size,
diag_bridge_write_cb, dev);
usb_anchor_urb(urb, &dev->submitted);
dev->pending_writes++;
ret = usb_submit_urb(urb, GFP_KERNEL);
if (ret) {
dev_err(&dev->udev->dev, "submitting urb failed err:%d\n", ret);
dev->pending_writes--;
usb_unanchor_urb(urb);
usb_free_urb(urb);
usb_autopm_put_interface(dev->ifc);
return ret;
}
#if 0
usb_free_urb(urb);
#endif
return 0;
}
static int sta32x_probe(struct snd_soc_codec *codec)
{
struct sta32x_priv *sta32x = snd_soc_codec_get_drvdata(codec);
int i, ret = 0;
sta32x->codec = codec;
/* regulators */
for (i = 0; i < ARRAY_SIZE(sta32x->supplies); i++)
sta32x->supplies[i].supply = sta32x_supply_names[i];
ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(sta32x->supplies),
sta32x->supplies);
if (ret != 0) {
dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
goto err;
}
ret = regulator_bulk_enable(ARRAY_SIZE(sta32x->supplies),
sta32x->supplies);
if (ret != 0) {
dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
goto err_get;
}
/* Tell ASoC what kind of I/O to use to read the registers. ASoC will
* then do the I2C transactions itself.
*/
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C);
if (ret < 0) {
dev_err(codec->dev, "failed to set cache I/O (ret=%i)\n", ret);
return ret;
}
/* Chip documentation explicitly requires that the reset values
* of reserved register bits are left untouched.
* Write the register default value to cache for reserved registers,
* so the write to the these registers are suppressed by the cache
* restore code when it skips writes of default registers.
*/
snd_soc_cache_write(codec, STA32X_CONFC, 0xc2);
snd_soc_cache_write(codec, STA32X_CONFE, 0xc2);
snd_soc_cache_write(codec, STA32X_CONFF, 0x5c);
snd_soc_cache_write(codec, STA32X_MMUTE, 0x10);
snd_soc_cache_write(codec, STA32X_AUTO1, 0x60);
snd_soc_cache_write(codec, STA32X_AUTO3, 0x00);
snd_soc_cache_write(codec, STA32X_C3CFG, 0x40);
/* FIXME enable thermal warning adjustment and recovery */
snd_soc_update_bits(codec, STA32X_CONFA,
STA32X_CONFA_TWAB | STA32X_CONFA_TWRB, 0);
/* FIXME select 2.1 mode */
snd_soc_update_bits(codec, STA32X_CONFF,
STA32X_CONFF_OCFG_MASK,
1 << STA32X_CONFF_OCFG_SHIFT);
/* FIXME channel to output mapping */
snd_soc_update_bits(codec, STA32X_C1CFG,
STA32X_CxCFG_OM_MASK,
0 << STA32X_CxCFG_OM_SHIFT);
snd_soc_update_bits(codec, STA32X_C2CFG,
STA32X_CxCFG_OM_MASK,
1 << STA32X_CxCFG_OM_SHIFT);
snd_soc_update_bits(codec, STA32X_C3CFG,
STA32X_CxCFG_OM_MASK,
2 << STA32X_CxCFG_OM_SHIFT);
/* initialize coefficient shadow RAM with reset values */
for (i = 4; i <= 49; i += 5)
sta32x->coef_shadow[i] = 0x400000;
for (i = 50; i <= 54; i++)
sta32x->coef_shadow[i] = 0x7fffff;
sta32x->coef_shadow[55] = 0x5a9df7;
sta32x->coef_shadow[56] = 0x7fffff;
sta32x->coef_shadow[59] = 0x7fffff;
sta32x->coef_shadow[60] = 0x400000;
sta32x->coef_shadow[61] = 0x400000;
sta32x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
/* Bias level configuration will have done an extra enable */
regulator_bulk_disable(ARRAY_SIZE(sta32x->supplies), sta32x->supplies);
return 0;
err_get:
regulator_bulk_free(ARRAY_SIZE(sta32x->supplies), sta32x->supplies);
err:
return ret;
}
static ssize_t tpm_try_transmit(struct tpm_chip *chip, void *buf, size_t bufsiz)
{
struct tpm_header *header = buf;
int rc;
ssize_t len = 0;
u32 count, ordinal;
unsigned long stop;
if (bufsiz < TPM_HEADER_SIZE)
return -EINVAL;
if (bufsiz > TPM_BUFSIZE)
bufsiz = TPM_BUFSIZE;
count = be32_to_cpu(header->length);
ordinal = be32_to_cpu(header->ordinal);
if (count == 0)
return -ENODATA;
if (count > bufsiz) {
dev_err(&chip->dev,
"invalid count value %x %zx\n", count, bufsiz);
return -E2BIG;
}
rc = chip->ops->send(chip, buf, count);
if (rc < 0) {
if (rc != -EPIPE)
dev_err(&chip->dev,
"%s: send(): error %d\n", __func__, rc);
return rc;
}
/* A sanity check. send() should just return zero on success e.g.
* not the command length.
*/
if (rc > 0) {
dev_warn(&chip->dev,
"%s: send(): invalid value %d\n", __func__, rc);
rc = 0;
}
if (chip->flags & TPM_CHIP_FLAG_IRQ)
goto out_recv;
stop = jiffies + tpm_calc_ordinal_duration(chip, ordinal);
do {
u8 status = chip->ops->status(chip);
if ((status & chip->ops->req_complete_mask) ==
chip->ops->req_complete_val)
goto out_recv;
if (chip->ops->req_canceled(chip, status)) {
dev_err(&chip->dev, "Operation Canceled\n");
return -ECANCELED;
}
tpm_msleep(TPM_TIMEOUT_POLL);
rmb();
} while (time_before(jiffies, stop));
chip->ops->cancel(chip);
dev_err(&chip->dev, "Operation Timed out\n");
return -ETIME;
out_recv:
len = chip->ops->recv(chip, buf, bufsiz);
if (len < 0) {
rc = len;
dev_err(&chip->dev, "tpm_transmit: tpm_recv: error %d\n", rc);
} else if (len < TPM_HEADER_SIZE || len != be32_to_cpu(header->length))
rc = -EFAULT;
return rc ? rc : len;
}
static int
intel_mid_i2s_find_usage(struct pci_dev *pdev,
struct intel_mid_i2s_hdl *drv_data,
enum intel_mid_i2s_ssp_usage *usage)
{
int pos;
u8 adid;
int status = 0;
*usage = SSP_USAGE_UNASSIGNED;
pos = pci_find_capability(pdev, PCI_CAP_ID_VNDR);
dev_info((&pdev->dev),
"Probe/find capability (VNDR %d pos=0x%x)\n",
PCI_CAP_ID_VNDR, pos);
if (pos > 0) {
pos += PCI_CAP_OFFSET_ADID;
pci_read_config_byte(pdev, pos, &adid);
dev_info(&(pdev->dev), "Vendor capability adid = 0x%x\n", adid);
if (adid == PCI_CAP_ADID_I2S_BT_FM)
*usage = SSP_USAGE_BLUETOOTH_FM;
else if (adid == PCI_CAP_ADID_I2S_MODEM)
*usage = SSP_USAGE_MODEM;
else
*usage = SSP_USAGE_UNASSIGNED;
}
/* If there is no capability, check with old PCI_ID */
#ifdef BYPASS_ADID
if (*usage == SSP_USAGE_UNASSIGNED) {
dev_warn(&(pdev->dev), "Vendor capability not present/invalid\n");
switch (pdev->device) {
case MFLD_SSP1_DEVICE_ID:
*usage = SSP_USAGE_BLUETOOTH_FM;
break;
case MFLD_SSP0_DEVICE_ID:
*usage = SSP_USAGE_MODEM;
break;
}
}
#endif
if (*usage == SSP_USAGE_UNASSIGNED) {
dev_info((&pdev->dev),
"No probe for I2S PCI-ID: %04x:%04x, ADID(0x%x)=0x%x\n",
pdev->vendor, pdev->device, pos, adid);
status = -ENODEV;
goto err_find_usage;
}
dev_dbg(&(pdev->dev),
"Detected PCI SSP (ID: %04x:%04x) usage =%x\n",
pdev->vendor, pdev->device, *usage);
dev_dbg(&(pdev->dev),
" found PCI SSP controller(ID: %04x:%04x)\n",
pdev->vendor, pdev->device);
/* Init the driver data structure fields*/
switch (pdev->device) {
case MFLD_SSP1_DEVICE_ID:
drv_data->device_instance = DMA1C_DEVICE_INSTANCE_SSP1;
break;
case MFLD_SSP0_DEVICE_ID:
drv_data->device_instance = DMA1C_DEVICE_INSTANCE_SSP0;
break;
default:
dev_err(&(pdev->dev),
"Can not determine dma device instance (PCI ID:%04x)\n",
pdev->device);
status = -ENODEV;
goto err_find_usage;
}
status = pci_enable_device(pdev);
if (status)
dev_err((&pdev->dev), "Can not enable device.Err=%d\n", status);
err_find_usage:
return status;
}
/**
* ehci_hcd_omap_probe - initialize TI-based HCDs
*
* Allocates basic resources for this USB host controller, and
* then invokes the start() method for the HCD associated with it
* through the hotplug entry's driver_data.
*/
static int ehci_hcd_omap_probe(struct platform_device *pdev)
{
struct ehci_hcd_omap_platform_data *pdata = pdev->dev.platform_data;
struct ehci_hcd_omap *omap;
struct resource *res;
struct usb_hcd *hcd;
int irq = platform_get_irq(pdev, 0);
int ret = -ENODEV;
printk(KERN_DEBUG " ehci_hcd_omap_probe\n");
if (!pdata) {
dev_dbg(&pdev->dev, "missing platform_data\n");
goto err_pdata;
}
if (usb_disabled())
{
printk(KERN_DEBUG " usb_disabled\n");
goto err_disabled;
}
omap = kzalloc(sizeof(*omap), GFP_KERNEL);
printk(KERN_DEBUG " kzalloc done\n");
if (!omap) {
printk(KERN_DEBUG " problem with memory allocation\n");
ret = -ENOMEM;
goto err_disabled;
}
hcd = usb_create_hcd(&ehci_omap_hc_driver, &pdev->dev,
dev_name(&pdev->dev));
printk(KERN_DEBUG " usb_create hcd done\n");
if (!hcd) {
printk(KERN_DEBUG " failed to create HCD\n");
dev_dbg(&pdev->dev, "failed to create hcd with err %d\n", ret);
ret = -ENOMEM;
goto err_create_hcd;
}
platform_set_drvdata(pdev, omap);
omap->dev = &pdev->dev;
omap->phy_reset = pdata->phy_reset;
omap->reset_gpio_port[0] = pdata->reset_gpio_port[0];
omap->reset_gpio_port[1] = pdata->reset_gpio_port[1];
omap->reset_gpio_port[2] = pdata->reset_gpio_port[2];
omap->port_mode[0] = pdata->port_mode[0];
omap->port_mode[1] = pdata->port_mode[1];
omap->port_mode[2] = pdata->port_mode[2];
omap->ehci = hcd_to_ehci(hcd);
omap->ehci->sbrn = 0x20;
omap->suspended = 0;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
printk(KERN_DEBUG " platform get ressources 0 done\n");
hcd->rsrc_start = res->start;
hcd->rsrc_len = resource_size(res);
hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
if (!hcd->regs) {
printk(KERN_DEBUG " EHCI ioremap failed\n");
dev_err(&pdev->dev, "EHCI ioremap failed\n");
ret = -ENOMEM;
goto err_ioremap;
}
/* we know this is the memory we want, no need to ioremap again */
omap->ehci->caps = hcd->regs;
omap->ehci_base = hcd->regs;
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
printk(KERN_DEBUG " platform get ressources 1 done\n");
omap->uhh_base = ioremap(res->start, resource_size(res));
if (!omap->uhh_base) {
printk(KERN_DEBUG " UHH ioremap failed\n");
dev_err(&pdev->dev, "UHH ioremap failed\n");
ret = -ENOMEM;
goto err_uhh_ioremap;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
printk(KERN_DEBUG " platform get ressources 2 done\n");
ret = omap_start_ehc(omap, hcd);
if (ret) {
dev_dbg(&pdev->dev, "failed to start ehci\n");
printk(KERN_DEBUG " failed to start ehci\n");
goto err_start;
}
omap->ehci->regs = hcd->regs
+ HC_LENGTH(readl(&omap->ehci->caps->hc_capbase));
dbg_hcs_params(omap->ehci, "reset");
dbg_hcc_params(omap->ehci, "reset");
/* cache this readonly data; minimize chip reads */
omap->ehci->hcs_params = readl(&omap->ehci->caps->hcs_params);
/* SET 1 micro-frame Interrupt interval */
writel(readl(&omap->ehci->regs->command) | (1 << 16),
&omap->ehci->regs->command);
ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
if (ret) {
dev_dbg(&pdev->dev, "failed to add hcd with err %d\n", ret);
goto err_add_hcd;
}
EP10_HW_ID=ep_get_hardware_id();
if(EP10_HW_ID==BOARD_VERSION_UNKNOWN)
{
EP10_HW_ID = BOARD_ID_DVT1 ;
}
printk(KERN_DEBUG " add hcd done\n");
return 0;
err_add_hcd:
omap_stop_ehc(omap, hcd);
err_start:
//iounmap(omap->tll_base);
err_tll_ioremap:
iounmap(omap->uhh_base);
err_uhh_ioremap:
iounmap(hcd->regs);
err_ioremap:
usb_put_hcd(hcd);
err_create_hcd:
kfree(omap);
err_disabled:
err_pdata:
return ret;
}
static int arc_ps2_probe(struct platform_device *pdev)
{
struct arc_ps2_data *arc_ps2;
struct resource *res;
int irq;
int error, id, i;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(&pdev->dev, "no IO memory defined\n");
return -EINVAL;
}
irq = platform_get_irq_byname(pdev, "arc_ps2_irq");
if (irq < 0) {
dev_err(&pdev->dev, "no IRQ defined\n");
return -EINVAL;
}
arc_ps2 = devm_kzalloc(&pdev->dev, sizeof(struct arc_ps2_data),
GFP_KERNEL);
if (!arc_ps2) {
dev_err(&pdev->dev, "out of memory\n");
return -ENOMEM;
}
arc_ps2->addr = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(arc_ps2->addr))
return PTR_ERR(arc_ps2->addr);
dev_info(&pdev->dev, "irq = %d, address = 0x%p, ports = %i\n",
irq, arc_ps2->addr, ARC_PS2_PORTS);
id = ioread32(arc_ps2->addr);
if (id != ARC_ARC_PS2_ID) {
dev_err(&pdev->dev, "device id does not match\n");
return -ENXIO;
}
arc_ps2_inhibit_ports(arc_ps2);
error = devm_request_irq(&pdev->dev, irq, arc_ps2_interrupt,
0, "arc_ps2", arc_ps2);
if (error) {
dev_err(&pdev->dev, "Could not allocate IRQ\n");
return error;
}
for (i = 0; i < ARC_PS2_PORTS; i++) {
error = arc_ps2_create_port(pdev, arc_ps2, i);
if (error) {
while (--i >= 0)
serio_unregister_port(arc_ps2->port[i].io);
return error;
}
}
platform_set_drvdata(pdev, arc_ps2);
return 0;
}
static int __devinit twl4030_rtc_probe(struct platform_device *pdev)
{
struct twl4030rtc_platform_data *pdata = pdev->dev.platform_data;
struct rtc_device *rtc;
int ret = 0;
u8 rd_reg;
if (pdata != NULL && pdata->init != NULL) {
ret = pdata->init();
if (ret < 0)
goto out;
}
rtc = rtc_device_register(pdev->name,
&pdev->dev, &twl4030_rtc_ops, THIS_MODULE);
if (IS_ERR(rtc)) {
ret = -EINVAL;
dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
PTR_ERR(rtc));
goto out0;
}
platform_set_drvdata(pdev, rtc);
ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
if (ret < 0)
goto out1;
if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
dev_warn(&pdev->dev, "Power up reset detected.\n");
if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
/* Clear RTC Power up reset and pending alarm interrupts */
ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
if (ret < 0)
goto out1;
ret = request_irq(TWL4030_MODIRQ_PWR, twl4030_rtc_interrupt,
IRQF_DISABLED | IRQF_SHARED, rtc->dev.bus_id, rtc);
if (ret < 0) {
dev_err(&pdev->dev, "IRQ is not free.\n");
goto out1;
}
/* Check RTC module status, Enable if it is off */
ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG);
if (ret < 0)
goto out2;
if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) {
dev_info(&pdev->dev, "Enabling TWL4030-RTC.\n");
rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M;
ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG);
if (ret < 0)
goto out2;
}
ret = twl4030_i2c_read_u8(TWL4030_MODULE_INT, &rd_reg, REG_PWR_IMR1);
if (ret < 0)
goto out2;
rd_reg &= PWR_RTC_IT_UNMASK;
/* MASK PWR - we will need this */
ret = twl4030_i2c_write_u8(TWL4030_MODULE_INT, rd_reg, REG_PWR_IMR1);
if (ret < 0)
goto out2;
ret = twl4030_i2c_read_u8(TWL4030_MODULE_INT, &rd_reg, REG_PWR_EDR1);
if (ret < 0)
goto out2;
/* Rising edge detection enabled, needed for RTC alarm */
rd_reg |= 0x80;
ret = twl4030_i2c_write_u8(TWL4030_MODULE_INT, rd_reg, REG_PWR_EDR1);
if (ret < 0)
goto out2;
return ret;
out2:
free_irq(TWL4030_MODIRQ_PWR, rtc);
out1:
rtc_device_unregister(rtc);
out0:
if (pdata != NULL && pdata->exit != NULL)
pdata->exit();
out:
return ret;
}
/* omap_start_ehc
* - Start the TI USBHOST controller
*/
static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd)
{
unsigned long timeout = jiffies + msecs_to_jiffies(1000);
u8 tll_ch_mask = 0;
unsigned reg = 0;
int ret = 0;
printk("omap_start_ehc kernel 2.6.35 V0.7 [09/02/2011] \n");
gpio_direction_output(23, 0);
PHY_reset = 0;
#ifndef CONFIG_MODEM_SMS
gpio_direction_output(21, 1);
gpio_direction_output(35, 1);
gpio_direction_output(36, 1);
EP10_HW_ID=ep_get_hardware_id();
if(EP10_HW_ID==BOARD_VERSION_UNKNOWN)
{
EP10_HW_ID = BOARD_ID_DVT1 ;
}
if(EP10_HW_ID>=BOARD_ID_DVT1)
{
gpio_direction_output(109, 1);
//printk("GPIO-109 enabled \n");
}
//printk("HW-ver= %d\n",EP10_HW_ID);
modem_PW = 1;
#endif
dev_dbg(omap->dev, "starting TI EHCI USB Controller\n");
/* Get all the clock handles we need */
omap->usbhost_ick = clk_get(omap->dev, "usbhost_ick");
if (IS_ERR(omap->usbhost_ick)) {
dev_err(omap->dev, "could not get usbhost_ick\n");
ret = PTR_ERR(omap->usbhost_ick);
goto err_host_ick;
}
omap->usbhost2_120m_fck = clk_get(omap->dev, "usbhost_120m_fck");
if (IS_ERR(omap->usbhost2_120m_fck)) {
dev_err(omap->dev, "could not get usbhost2_120m_fck\n");
ret = PTR_ERR(omap->usbhost2_120m_fck);
goto err_host_120m_fck;
}
omap->usbhost1_48m_fck = clk_get(omap->dev, "usbhost_48m_fck");
if (IS_ERR(omap->usbhost1_48m_fck)) {
dev_err(omap->dev, "could not get usbhost_48m_fck\n");
ret = PTR_ERR(omap->usbhost1_48m_fck);
goto err_host_48m_fck;
}
if (omap->phy_reset) {
printk(KERN_DEBUG "reset the phys\n");
/* Refer: ISSUE1 */
if (gpio_is_valid(omap->reset_gpio_port[0]))
{
gpio_request(omap->reset_gpio_port[0],
"USB1 PHY reset");
gpio_direction_output(omap->reset_gpio_port[0], 0);
}
if (gpio_is_valid(omap->reset_gpio_port[1]))
{
gpio_request(omap->reset_gpio_port[1],"USB2 PHY reset");
gpio_direction_output(omap->reset_gpio_port[1], 0);
}
/* Hold the PHY in RESET for enough time till DIR is high */
udelay(10);
}
omap->usbtll_fck = clk_get(omap->dev, "usbtll_fck");
if (IS_ERR(omap->usbtll_fck)) {
dev_err(omap->dev, "could not get usbtll_fck\n");
ret = PTR_ERR(omap->usbtll_fck);
goto err_tll_fck;
}
omap->usbtll_ick = clk_get(omap->dev, "usbtll_ick");
if (IS_ERR(omap->usbtll_ick)) {
dev_err(omap->dev, "could not get usbtll_ick\n");
ret = PTR_ERR(omap->usbtll_ick);
goto err_tll_ick;
}
/* Now enable all the clocks in the correct order */
ehci_omap_clock_power(omap, 1);
/* Put UHH in NoIdle/NoStandby mode */
reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_SYSCONFIG);
reg |= OMAP_UHH_SYSCONFIG_CACTIVITY
| OMAP_UHH_SYSCONFIG_AUTOIDLE
| OMAP_UHH_SYSCONFIG_ENAWAKEUP;
reg &= ~(OMAP_UHH_SYSCONFIG_SIDLEMASK | OMAP_UHH_SYSCONFIG_MIDLEMASK);
reg |= OMAP_UHH_SYSCONFIG_NOIDLE
| OMAP_UHH_SYSCONFIG_NOSTDBY;
ehci_omap_writel(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg);
reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
/* setup ULPI bypass and burst configurations */
reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
| OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
| OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN);
reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN;
if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_UNKNOWN)
reg &= ~OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS;
if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_UNKNOWN)
reg &= ~OMAP_UHH_HOSTCONFIG_P2_CONNECT_STATUS;
if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_UNKNOWN)
reg &= ~OMAP_UHH_HOSTCONFIG_P3_CONNECT_STATUS;
/* Bypass the TLL module for PHY mode operation */
if (cpu_is_omap3430() && (omap_rev() <= OMAP3430_REV_ES2_1)) {
dev_dbg(omap->dev, "OMAP3 ES version <= ES2.1\n");
if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) ||
(omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) ||
(omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY))
reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
else
reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
} else {
dev_dbg(omap->dev, "OMAP3 ES version > ES2.1\n");
if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY)
reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
else if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL)
reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY)
reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
else if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL)
reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)
reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
else if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)
reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
}
ehci_omap_writel(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
dev_dbg(omap->dev, "UHH setup done, uhh_hostconfig=%x\n", reg);
/*
* An undocumented "feature" in the OMAP3 EHCI controller,
* causes suspended ports to be taken out of suspend when
* the USBCMD.Run/Stop bit is cleared (for example when
* we do ehci_bus_suspend).
* This breaks suspend-resume if the root-hub is allowed
* to suspend. Writing 1 to this undocumented register bit
* disables this feature and restores normal behavior.
*/
ehci_omap_writel(omap->ehci_base, EHCI_INSNREG04,
EHCI_INSNREG04_DISABLE_UNSUSPEND);
if (omap->phy_reset) {
printk(KERN_DEBUG "unreset the phys\n");
/* Refer ISSUE1:
* Hold the PHY in RESET for enough time till
* PHY is settled and ready
*/
udelay(10);
if (gpio_is_valid(omap->reset_gpio_port[0]))
gpio_set_value(omap->reset_gpio_port[0], 1);
if (gpio_is_valid(omap->reset_gpio_port[1]))
gpio_set_value(omap->reset_gpio_port[1], 1);
}
//gpio_direction_output(21, 1);
//gpio_direction_output(36, 1);
//gpio_direction_output(35, 1);
//msleep(10);
printk("RESET USB PHY\n");
gpio_direction_output(23, 1);
PHY_reset = 1;
return 0;
err_sys_status:
ehci_omap_clock_power(omap, 0);
clk_put(omap->usbtll_ick);
err_tll_ick:
clk_put(omap->usbtll_fck);
err_tll_fck:
clk_put(omap->usbhost1_48m_fck);
if (omap->phy_reset) {
if (gpio_is_valid(omap->reset_gpio_port[0]))
gpio_free(omap->reset_gpio_port[0]);
if (gpio_is_valid(omap->reset_gpio_port[1]))
gpio_free(omap->reset_gpio_port[1]);
}
err_host_48m_fck:
clk_put(omap->usbhost2_120m_fck);
err_host_120m_fck:
clk_put(omap->usbhost_ick);
err_host_ick:
return ret;
}
/**
* radeon_driver_load_kms - Main load function for KMS.
*
* @dev: drm dev pointer
* @flags: device flags
*
* This is the main load function for KMS (all asics).
* It calls radeon_device_init() to set up the non-display
* parts of the chip (asic init, CP, writeback, etc.), and
* radeon_modeset_init() to set up the display parts
* (crtcs, encoders, hotplug detect, etc.).
* Returns 0 on success, error on failure.
*/
int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
{
struct radeon_device *rdev;
int r, acpi_status;
rdev = kzalloc(sizeof(struct radeon_device), GFP_KERNEL);
if (rdev == NULL) {
return -ENOMEM;
}
dev->dev_private = (void *)rdev;
/* update BUS flag */
if (drm_pci_device_is_agp(dev)) {
flags |= RADEON_IS_AGP;
} else if (pci_is_pcie(dev->pdev)) {
flags |= RADEON_IS_PCIE;
} else {
flags |= RADEON_IS_PCI;
}
/* radeon_device_init should report only fatal error
* like memory allocation failure or iomapping failure,
* or memory manager initialization failure, it must
* properly initialize the GPU MC controller and permit
* VRAM allocation
*/
r = radeon_device_init(rdev, dev, dev->pdev, flags);
if (r) {
dev_err(&dev->pdev->dev, "Fatal error during GPU init\n");
goto out;
}
/* Again modeset_init should fail only on fatal error
* otherwise it should provide enough functionalities
* for shadowfb to run
*/
r = radeon_modeset_init(rdev);
if (r)
dev_err(&dev->pdev->dev, "Fatal error during modeset init\n");
/* Call ACPI methods: require modeset init
* but failure is not fatal
*/
if (!r) {
acpi_status = radeon_acpi_init(rdev);
if (acpi_status)
dev_dbg(&dev->pdev->dev,
"Error during ACPI methods call\n");
}
if (radeon_runtime_pm != 0) {
pm_runtime_use_autosuspend(dev->dev);
pm_runtime_set_autosuspend_delay(dev->dev, 5000);
pm_runtime_set_active(dev->dev);
pm_runtime_allow(dev->dev);
pm_runtime_mark_last_busy(dev->dev);
pm_runtime_put_autosuspend(dev->dev);
}
out:
if (r)
radeon_driver_unload_kms(dev);
return r;
}
/**
* i2s_dma_start - prepare and reserve dma channels
* @arg : intel_mid_i2s_hdl pointer to that should be driver data (context)
*
* "ssp open" context and dmac1 should already be filled in drv_data
*
* Output parameters
* int : should be zero, else it means error code
*/
static int i2s_dma_start(struct intel_mid_i2s_hdl *drv_data)
{
struct intel_mid_dma_slave *rxs, *txs;
struct pci_dev *l_pdev;
struct intel_mid_i2s_settings *ssp_settings =
&(drv_data->current_settings);
dma_cap_mask_t mask;
int retval = 0;
int temp = 0;
dev_dbg(&drv_data->pdev->dev, "DMAC1 start\n");
drv_data->txchan = NULL;
drv_data->rxchan = NULL;
l_pdev = drv_data->pdev;
if (ssp_settings->ssp_active_rx_slots_map) {
/* 1. init rx channel */
rxs = &drv_data->dmas_rx;
rxs->dma_slave.direction = DMA_FROM_DEVICE;
rxs->hs_mode = LNW_DMA_HW_HS;
rxs->cfg_mode = LNW_DMA_PER_TO_MEM;
temp = i2s_compute_dma_width(ssp_settings->data_size,
&rxs->dma_slave.src_addr_width);
if (temp != 0) {
dev_err(&(drv_data->pdev->dev),
"RX DMA Channel Bad data_size = %d\n",
ssp_settings->data_size);
retval = -1;
goto err_exit;
}
rxs->dma_slave.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
temp = i2s_compute_dma_msize(
ssp_settings->ssp_rx_fifo_threshold,
&rxs->dma_slave.src_maxburst);
if (temp != 0) {
dev_err(&(drv_data->pdev->dev),
"RX DMA Channel Bad RX FIFO Threshold src= %d\n",
ssp_settings->ssp_rx_fifo_threshold);
retval = -2;
goto err_exit;
}
temp = i2s_compute_dma_msize(
ssp_settings->ssp_rx_fifo_threshold,
&rxs->dma_slave.dst_maxburst);
if (temp != 0) {
dev_err(&(drv_data->pdev->dev),
"RX DMA Channel Bad RX FIFO Threshold dst= %d\n",
ssp_settings->ssp_rx_fifo_threshold);
retval = -3;
goto err_exit;
}
rxs->device_instance = drv_data->device_instance;
dma_cap_zero(mask);
dma_cap_set(DMA_MEMCPY, mask);
dma_cap_set(DMA_SLAVE, mask);
drv_data->rxchan = dma_request_channel(mask,
chan_filter, drv_data);
if (!drv_data->rxchan) {
dev_err(&(drv_data->pdev->dev),
"Could not get Rx channel\n");
retval = -4;
goto err_exit;
}
temp = drv_data->rxchan->device->device_control(
drv_data->rxchan, DMA_SLAVE_CONFIG,
(unsigned long) &rxs->dma_slave);
if (temp) {
dev_err(&(drv_data->pdev->dev),
"Rx slave control failed\n");
retval = -5;
goto err_exit;
}
}
if (ssp_settings->ssp_active_tx_slots_map) {
/* 2. init tx channel */
txs = &drv_data->dmas_tx;
txs->dma_slave.direction = DMA_TO_DEVICE;
txs->hs_mode = LNW_DMA_HW_HS;
txs->cfg_mode = LNW_DMA_MEM_TO_PER;
txs->dma_slave.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
temp = i2s_compute_dma_width(ssp_settings->data_size,
&txs->dma_slave.dst_addr_width);
if (temp != 0) {
dev_err(&(drv_data->pdev->dev),
"TX DMA Channel Bad data_size = %d\n",
ssp_settings->data_size);
retval = -6;
goto err_exit;
}
temp = i2s_compute_dma_msize(
ssp_settings->ssp_tx_fifo_threshold + 1,
&txs->dma_slave.src_maxburst);
if (temp != 0) {
dev_err(&(drv_data->pdev->dev),
"TX DMA Channel Bad TX FIFO Threshold src= %d\n",
ssp_settings->ssp_tx_fifo_threshold);
retval = -7;
goto err_exit;
}
temp = i2s_compute_dma_msize(
ssp_settings->ssp_tx_fifo_threshold + 1,
&txs->dma_slave.dst_maxburst);
if (temp != 0) {
dev_err(&(drv_data->pdev->dev),
"TX DMA Channel Bad TX FIFO Threshold dst= %d\n",
ssp_settings->ssp_tx_fifo_threshold);
retval = -8;
goto err_exit;
}
txs->device_instance = drv_data->device_instance;
dma_cap_set(DMA_SLAVE, mask);
dma_cap_set(DMA_MEMCPY, mask);
drv_data->txchan = dma_request_channel(mask,
chan_filter, drv_data);
if (!drv_data->txchan) {
dev_err(&(drv_data->pdev->dev),
"Could not get Tx channel\n");
retval = -10;
goto err_exit;
}
temp = drv_data->txchan->device->device_control(
drv_data->txchan, DMA_SLAVE_CONFIG,
(unsigned long) &txs->dma_slave);
if (temp) {
dev_err(&(drv_data->pdev->dev),
"Tx slave control failed\n");
retval = -9;
goto err_exit;
}
}
return retval;
err_exit:
if (drv_data->txchan)
dma_release_channel(drv_data->txchan);
if (drv_data->rxchan)
dma_release_channel(drv_data->rxchan);
drv_data->rxchan = NULL;
drv_data->txchan = NULL;
return retval;
}
/**
* intel_mid_i2s_probe - probing function for the pci selected
* @pdev : pci_dev pointer that is probed
* @ent : pci_device_id
*
* Output parameters
* NA
*/
static int intel_mid_i2s_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
struct intel_mid_i2s_hdl *drv_data;
int status = 0;
enum intel_mid_i2s_ssp_usage usage;
drv_data = kzalloc(sizeof(struct intel_mid_i2s_hdl), GFP_KERNEL);
dev_dbg(&(pdev->dev), "%s Probe, drv_data =%p\n",
DRIVER_NAME, drv_data);
if (!drv_data) {
dev_err((&pdev->dev), "Can't alloc driver data in probe\n");
status = -ENOMEM;
goto leave;
}
dev_info((&pdev->dev), "Detected PCI SSP (ID: %04x:%04x)\n",
pdev->vendor, pdev->device);
status = intel_mid_i2s_find_usage(pdev, drv_data, &usage);
if (status)
goto err_i2s_probe0;
mutex_init(&drv_data->mutex);
drv_data->pdev = pdev;
drv_data->usage = usage;
/*
* Get basic io resource and map it for SSP1 [BAR=0]
*/
if ((pdev->device == MFLD_SSP1_DEVICE_ID) ||
(pdev->device == MFLD_SSP0_DEVICE_ID)) {
drv_data->paddr = pci_resource_start(pdev, MRST_SSP_BAR);
drv_data->iolen = pci_resource_len(pdev, MRST_SSP_BAR);
status = pci_request_region(pdev, MRST_SSP_BAR,
dev_name(&pdev->dev));
/* map bus memory into CPU space */
drv_data->ioaddr = pci_ioremap_bar(pdev, MRST_SSP_BAR);
} else {
dev_err(&pdev->dev,
"Don't know which BAR to usefor this SSP PCDID=%x\n",
pdev->device);
status = -ENODEV;
goto err_i2s_probe1;
}
dev_dbg(&(pdev->dev), "paddr = : %x\n", (unsigned int) drv_data->paddr);
dev_dbg(&(pdev->dev), "iolen = : %d\n", drv_data->iolen);
if (status) {
dev_err((&pdev->dev), "Can't request region. err=%d\n", status);
goto err_i2s_probe1;
}
if (!drv_data->ioaddr) {
dev_err((&pdev->dev), "ioremap_nocache error\n");
status = -ENOMEM;
goto err_i2s_probe2;
}
dev_dbg(&(pdev->dev), "ioaddr = : %p\n", drv_data->ioaddr);
/* prepare for DMA channel allocation */
/* get the pci_dev structure pointer */
/* Check the SSP, if SSP3, then another DMA is used (GPDMA..) */
if ((pdev->device == MFLD_SSP1_DEVICE_ID) ||
(pdev->device == MFLD_SSP0_DEVICE_ID)) {
drv_data->dmac1 = pci_get_device(PCI_VENDOR_ID_INTEL,
MFLD_LPE_DMA_DEVICE_ID,
NULL);
} else {
dev_err(&pdev->dev,
"Don't know dma device ID for this SSP PCDID=%x\n",
pdev->device);
goto err_i2s_probe3;
}
/* in case the stop dma have to wait for end of callbacks */
/* This will be removed when TERMINATE_ALL available in DMA */
init_waitqueue_head(&drv_data->wq_chan_closing);
if (!drv_data->dmac1) {
dev_err(&(drv_data->pdev->dev), "Can't find DMAC1, dma init failed\n");
status = -ENODEV;
goto err_i2s_probe3;
}
/* increment ref count of pci device structure already done by */
/* pci_get_device. will do a pci_dev_put when exiting the module */
pci_set_drvdata(pdev, drv_data);
/* set SSP FrameSync and CLK direction in INPUT mode in order
* to avoid disturbing peripherals
*/
write_SSCR1((SSCR1_SFRMDIR_MASK<<SSCR1_SFRMDIR_SHIFT)
| (SSCR1_SCLKDIR_MASK<<SSCR1_SCLKDIR_SHIFT),
drv_data->ioaddr);
/* Attach to IRQ */
drv_data->irq = pdev->irq;
dev_dbg(&(pdev->dev), "attaching to IRQ: %04x\n", pdev->irq);
status = request_irq(drv_data->irq, i2s_int, IRQF_SHARED,
"i2s ssp", drv_data);
if (status < 0) {
dev_err(&pdev->dev, "can not get IRQ. status err=%d\n", status);
goto err_i2s_probe3;
}
pm_runtime_put_noidle(&pdev->dev);
pm_runtime_allow(&(drv_data->pdev->dev));
goto leave;
err_i2s_probe3:
iounmap(drv_data->ioaddr);
err_i2s_probe2:
pci_release_region(pdev, MRST_SSP_BAR);
err_i2s_probe1:
pci_disable_device(pdev);
err_i2s_probe0:
kfree(drv_data);
leave:
return status;
}
static int cypress_touchkey_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct device *dev = &client->dev;
struct input_dev *input_dev;
struct cypress_touchkey_devdata *devdata;
u8 data[3];
int err;
int cnt;
#if defined(TOUCH_UPDATE)
int ret;
int retry = 10;
#endif
if (!dev->platform_data) {
dev_err(dev, "%s: Platform data is NULL\n", __func__);
return -EINVAL;
}
devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
if (devdata == NULL) {
dev_err(dev, "%s: failed to create our state\n", __func__);
return -ENODEV;
}
devdata->client = client;
i2c_set_clientdata(client, devdata);
devdata->pdata = client->dev.platform_data;
if (!devdata->pdata->keycode) {
dev_err(dev, "%s: Invalid platform data\n", __func__);
err = -EINVAL;
goto err_null_keycodes;
}
strlcpy(devdata->client->name, DEVICE_NAME, I2C_NAME_SIZE);
input_dev = input_allocate_device();
if (!input_dev) {
err = -ENOMEM;
goto err_input_alloc_dev;
}
devdata->input_dev = input_dev;
dev_set_drvdata(&input_dev->dev, devdata);
input_dev->name = DEVICE_NAME;
input_dev->id.bustype = BUS_HOST;
for (cnt = 0; cnt < devdata->pdata->keycode_cnt; cnt++)
input_set_capability(input_dev, EV_KEY,
devdata->pdata->keycode[cnt]);
err = input_register_device(input_dev);
if (err)
goto err_input_reg_dev;
devdata->is_powering_on = true;
devdata->pdata->touchkey_onoff(TOUCHKEY_ON);
err = i2c_master_recv(client, data, sizeof(data));
if (err < sizeof(data)) {
if (err >= 0)
err = -EIO;
dev_err(dev, "%s: error reading hardware version\n", __func__);
goto err_read;
}
dev_info(dev, "%s: hardware rev1 = %#02x, rev2 = %#02x\n", __func__,
data[1], data[2]);
devdata->backlight_on = BACKLIGHT_ON;
devdata->backlight_off = BACKLIGHT_OFF;
devdata->has_legacy_keycode = 1;
#if 0
err = i2c_touchkey_write_byte(devdata, devdata->backlight_on);
if (err) {
dev_err(dev, "%s: touch keypad backlight on failed\n",
__func__);
goto err_backlight_on;
}
#endif
if (request_threaded_irq(client->irq, touchkey_interrupt_handler,
touchkey_interrupt_thread, IRQF_TRIGGER_FALLING,
DEVICE_NAME, devdata)) {
dev_err(dev, "%s: Can't allocate irq.\n", __func__);
goto err_req_irq;
}
#ifdef CONFIG_HAS_EARLYSUSPEND
devdata->early_suspend.suspend = cypress_touchkey_early_suspend;
devdata->early_suspend.resume = cypress_touchkey_early_resume;
#endif
register_early_suspend(&devdata->early_suspend);
devdata->is_powering_on = false;
#if defined(TOUCH_UPDATE)
ret = misc_register(&touchkey_update_device);
if (ret) {
printk("%s misc_register fail\n", __FUNCTION__);
goto err_misc_reg;
}
dev_set_drvdata(touchkey_update_device.this_device, devdata);
if (device_create_file
(touchkey_update_device.this_device, &dev_attr_touch_version) < 0) {
printk("%s device_create_file fail dev_attr_touch_version\n",
__FUNCTION__);
pr_err("Failed to create device file(%s)!\n",
dev_attr_touch_version.attr.name);
}
if (device_create_file
(touchkey_update_device.this_device, &dev_attr_touch_update) < 0) {
printk("%s device_create_file fail dev_attr_touch_update\n",
__FUNCTION__);
pr_err("Failed to create device file(%s)!\n",
dev_attr_touch_update.attr.name);
}
if (device_create_file
(touchkey_update_device.this_device, &dev_attr_brightness) < 0) {
printk("%s device_create_file fail dev_attr_touch_update\n",
__FUNCTION__);
pr_err("Failed to create device file(%s)!\n",
dev_attr_brightness.attr.name);
}
if (device_create_file
(touchkey_update_device.this_device,
&dev_attr_enable_disable) < 0) {
printk("%s device_create_file fail dev_attr_touch_update\n",
__FUNCTION__);
pr_err("Failed to create device file(%s)!\n",
dev_attr_enable_disable.attr.name);
}
touchkey_wq = create_singlethread_workqueue(DEVICE_NAME);
if (!touchkey_wq)
goto err_create_wq;
while (retry--) {
if (get_touchkey_firmware(data) == 0) //melfas need delay for multiple read
break;
}
printk("%s F/W version: 0x%x, Module version:0x%x\n", __FUNCTION__,
data[1], data[2]);
#endif
return 0;
err_create_wq:
#if defined(TOUCH_UPDATE)
misc_deregister(&touchkey_update_device);
#endif
err_misc_reg:
err_req_irq:
err_backlight_on:
err_read:
devdata->pdata->touchkey_onoff(TOUCHKEY_OFF);
input_unregister_device(input_dev);
goto err_input_alloc_dev;
err_input_reg_dev:
input_free_device(input_dev);
err_input_alloc_dev:
err_null_keycodes:
kfree(devdata);
return err;
}
static int __devinit twlreg_probe(struct platform_device *pdev)
{
int i;
struct twlreg_info *info;
struct regulator_init_data *initdata;
struct regulation_constraints *c;
struct regulator_dev *rdev;
for (i = 0, info = NULL; i < ARRAY_SIZE(twl_regs); i++) {
if (twl_regs[i].desc.id != pdev->id)
continue;
info = twl_regs + i;
break;
}
if (!info)
return -ENODEV;
initdata = pdev->dev.platform_data;
if (!initdata)
return -EINVAL;
/* copy the features into regulator data */
info->features = (unsigned long)initdata->driver_data;
/* Constrain board-specific capabilities according to what
* this driver and the chip itself can actually do.
*/
c = &initdata->constraints;
c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS;
switch (pdev->id) {
case TWL4030_REG_VIO:
case TWL4030_REG_VDD1:
case TWL4030_REG_VDD2:
case TWL4030_REG_VPLL1:
case TWL4030_REG_VINTANA1:
case TWL4030_REG_VINTANA2:
case TWL4030_REG_VINTDIG:
c->always_on = true;
break;
default:
break;
}
switch (pdev->id) {
case TWL6025_REG_SMPS3:
if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS3)
info->flags |= SMPS_EXTENDED_EN;
if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS3)
info->flags |= SMPS_OFFSET_EN;
break;
case TWL6025_REG_SMPS4:
if (twl_get_smps_mult() & SMPS_MULTOFFSET_SMPS4)
info->flags |= SMPS_EXTENDED_EN;
if (twl_get_smps_offset() & SMPS_MULTOFFSET_SMPS4)
info->flags |= SMPS_OFFSET_EN;
break;
case TWL6025_REG_VIO:
if (twl_get_smps_mult() & SMPS_MULTOFFSET_VIO)
info->flags |= SMPS_EXTENDED_EN;
if (twl_get_smps_offset() & SMPS_MULTOFFSET_VIO)
info->flags |= SMPS_OFFSET_EN;
break;
}
rdev = regulator_register(&info->desc, &pdev->dev, initdata, info, NULL);
if (IS_ERR(rdev)) {
dev_err(&pdev->dev, "can't register %s, %ld\n",
info->desc.name, PTR_ERR(rdev));
return PTR_ERR(rdev);
}
platform_set_drvdata(pdev, rdev);
if (twl_class_is_4030())
twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
info->remap);
/* NOTE: many regulators support short-circuit IRQs (presentable
* as REGULATOR_OVER_CURRENT notifications?) configured via:
* - SC_CONFIG
* - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
* - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
* - IT_CONFIG
*/
return 0;
}
static int __devinit qt1070_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct qt1070_data *data;
struct input_dev *input;
int i;
int err;
err = i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE);
if (!err) {
dev_err(&client->dev, "%s adapter not supported\n",
dev_driver_string(&client->adapter->dev));
return -ENODEV;
}
if (!client->irq) {
dev_err(&client->dev, "please assign the irq to this device\n");
return -EINVAL;
}
/* Identify the qt1070 chip */
if (!qt1070_identify(client))
return -ENODEV;
data = kzalloc(sizeof(struct qt1070_data), GFP_KERNEL);
input = input_allocate_device();
if (!data || !input) {
dev_err(&client->dev, "insufficient memory\n");
err = -ENOMEM;
goto err_free_mem;
}
data->client = client;
data->input = input;
data->irq = client->irq;
input->name = "AT42QT1070 QTouch Sensor";
input->dev.parent = &client->dev;
input->id.bustype = BUS_I2C;
/* Add the keycode */
input->keycode = data->keycodes;
input->keycodesize = sizeof(data->keycodes[0]);
input->keycodemax = ARRAY_SIZE(qt1070_key2code);
__set_bit(EV_KEY, input->evbit);
for (i = 0; i < ARRAY_SIZE(qt1070_key2code); i++) {
data->keycodes[i] = qt1070_key2code[i];
__set_bit(qt1070_key2code[i], input->keybit);
}
/* Calibrate device */
qt1070_write(client, CALIBRATE_CMD, 1);
msleep(QT1070_CAL_TIME);
/* Soft reset */
qt1070_write(client, RESET, 1);
msleep(QT1070_RESET_TIME);
err = request_threaded_irq(client->irq, NULL, qt1070_interrupt,
IRQF_TRIGGER_NONE, client->dev.driver->name, data);
if (err) {
dev_err(&client->dev, "fail to request irq\n");
goto err_free_mem;
}
/* Register the input device */
err = input_register_device(data->input);
if (err) {
dev_err(&client->dev, "Failed to register input device\n");
goto err_free_irq;
}
i2c_set_clientdata(client, data);
/* Read to clear the chang line */
qt1070_read(client, DET_STATUS);
return 0;
err_free_irq:
free_irq(client->irq, data);
err_free_mem:
input_free_device(input);
kfree(data);
return err;
}
static int wm8523_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
struct wm8523_priv *wm8523;
unsigned int val;
int ret, i;
wm8523 = devm_kzalloc(&i2c->dev, sizeof(struct wm8523_priv),
GFP_KERNEL);
if (wm8523 == NULL)
return -ENOMEM;
wm8523->regmap = devm_regmap_init_i2c(i2c, &wm8523_regmap);
if (IS_ERR(wm8523->regmap)) {
ret = PTR_ERR(wm8523->regmap);
dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret);
return ret;
}
for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
wm8523->supplies[i].supply = wm8523_supply_names[i];
ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8523->supplies),
wm8523->supplies);
if (ret != 0) {
dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
return ret;
}
ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
wm8523->supplies);
if (ret != 0) {
dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
return ret;
}
ret = regmap_read(wm8523->regmap, WM8523_DEVICE_ID, &val);
if (ret < 0) {
dev_err(&i2c->dev, "Failed to read ID register\n");
goto err_enable;
}
if (val != 0x8523) {
dev_err(&i2c->dev, "Device is not a WM8523, ID is %x\n", ret);
ret = -EINVAL;
goto err_enable;
}
ret = regmap_read(wm8523->regmap, WM8523_REVISION, &val);
if (ret < 0) {
dev_err(&i2c->dev, "Failed to read revision register\n");
goto err_enable;
}
dev_info(&i2c->dev, "revision %c\n",
(val & WM8523_CHIP_REV_MASK) + 'A');
ret = regmap_write(wm8523->regmap, WM8523_DEVICE_ID, 0x8523);
if (ret != 0) {
dev_err(&i2c->dev, "Failed to reset device: %d\n", ret);
goto err_enable;
}
regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
i2c_set_clientdata(i2c, wm8523);
ret = snd_soc_register_codec(&i2c->dev,
&soc_codec_dev_wm8523, &wm8523_dai, 1);
return ret;
err_enable:
regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
return ret;
}
static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
{
struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data;
struct device *dev = &pdev->dev;
struct sdhci_host *host;
struct sdhci_s3c *sc;
struct resource *res;
int ret, irq, ptr, clks;
if (!pdata) {
dev_err(dev, "no device data specified\n");
return -ENOENT;
}
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
dev_err(dev, "no irq specified\n");
return irq;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(dev, "no memory specified\n");
return -ENOENT;
}
host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c));
if (IS_ERR(host)) {
dev_err(dev, "sdhci_alloc_host() failed\n");
return PTR_ERR(host);
}
sc = sdhci_priv(host);
sc->host = host;
sc->pdev = pdev;
sc->pdata = pdata;
sc->ext_cd_gpio = -1; /* invalid gpio number */
platform_set_drvdata(pdev, host);
sc->clk_io = clk_get(dev, "hsmmc");
if (IS_ERR(sc->clk_io)) {
dev_err(dev, "failed to get io clock\n");
ret = PTR_ERR(sc->clk_io);
goto err_io_clk;
}
/* enable the local io clock and keep it running for the moment. */
clk_enable(sc->clk_io);
for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
struct clk *clk;
char *name = pdata->clocks[ptr];
if (name == NULL)
continue;
clk = clk_get(dev, name);
if (IS_ERR(clk)) {
dev_err(dev, "failed to get clock %s\n", name);
continue;
}
clks++;
sc->clk_bus[ptr] = clk;
/*
* save current clock index to know which clock bus
* is used later in overriding functions.
*/
sc->cur_clk = ptr;
clk_enable(clk);
dev_info(dev, "clock source %d: %s (%ld Hz)\n",
ptr, name, clk_get_rate(clk));
}
if (clks == 0) {
dev_err(dev, "failed to find any bus clocks\n");
ret = -ENOENT;
goto err_no_busclks;
}
sc->ioarea = request_mem_region(res->start, resource_size(res),
mmc_hostname(host->mmc));
if (!sc->ioarea) {
dev_err(dev, "failed to reserve register area\n");
ret = -ENXIO;
goto err_req_regs;
}
host->ioaddr = ioremap_nocache(res->start, resource_size(res));
if (!host->ioaddr) {
dev_err(dev, "failed to map registers\n");
ret = -ENXIO;
goto err_req_regs;
}
/* Ensure we have minimal gpio selected CMD/CLK/Detect */
if (pdata->cfg_gpio)
pdata->cfg_gpio(pdev, pdata->max_width);
host->hw_name = "samsung-hsmmc";
host->ops = &sdhci_s3c_ops;
host->quirks = 0;
host->irq = irq;
/* Setup quirks for the controller */
host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
#ifndef CONFIG_MMC_SDHCI_S3C_DMA
/* we currently see overruns on errors, so disable the SDMA
* support as well. */
host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
#endif /* CONFIG_MMC_SDHCI_S3C_DMA */
/* It seems we do not get an DATA transfer complete on non-busy
* transfers, not sure if this is a problem with this specific
* SDHCI block, or a missing configuration that needs to be set. */
host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
if (pdata->cd_type == S3C_SDHCI_CD_NONE)
host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
host->mmc->caps = MMC_CAP_NONREMOVABLE;
if (pdata->host_caps)
host->mmc->caps |= pdata->host_caps;
/* if vmmc_name is in pdata */
if (pdata->vmmc_name)
host->vmmc_name = pdata->vmmc_name;
host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
SDHCI_QUIRK_32BIT_DMA_SIZE);
/* HSMMC on Samsung SoCs uses SDCLK as timeout clock */
host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
/*
* If controller does not have internal clock divider,
* we can use overriding functions instead of default.
*/
if (pdata->clk_type) {
sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock;
sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock;
sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock;
}
/* It supports additional host capabilities if needed */
if (pdata->host_caps)
host->mmc->caps |= pdata->host_caps;
/* for BCM WIFI */
if (pdata->pm_flags)
host->mmc->pm_flags |= pdata->pm_flags;
/* To turn on vmmc regulator only if sd card exists,
GPIO pin for card detection should be initialized.
Moved from sdhci_s3c_setup_card_detect_gpio() function */
if (pdata->cd_type == S3C_SDHCI_CD_GPIO &&
gpio_is_valid(pdata->ext_cd_gpio)) {
if (gpio_request(pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) {
sc->ext_cd_gpio = pdata->ext_cd_gpio;
sc->ext_cd_gpio_invert = pdata->ext_cd_gpio_invert;
mmc_host_sd_set_present(host->mmc);
if (sd_detection_cmd_dev == NULL &&
sc->ext_cd_gpio) {
sd_detection_cmd_dev =
device_create(sec_class, NULL, 0,
NULL, "sdcard");
if (IS_ERR(sd_detection_cmd_dev))
pr_err("Fail to create sysfs dev\n");
if (device_create_file(sd_detection_cmd_dev,
&dev_attr_status) < 0)
pr_err("Fail to create sysfs file\n");
dev_set_drvdata(sd_detection_cmd_dev, sc);
}
#ifdef CONFIG_MIDAS_COMMON
/* set TF_EN gpio as OUTPUT */
gpio_request(GPIO_TF_EN, "TF_EN");
gpio_direction_output(GPIO_TF_EN, 1);
s3c_gpio_cfgpin(GPIO_TF_EN, S3C_GPIO_SFN(1));
s3c_gpio_setpull(GPIO_TF_EN, S3C_GPIO_PULL_NONE);
#endif
} else {
dev_err(dev, "cannot request gpio for card detect\n");
}
}
ret = sdhci_add_host(host);
if (ret) {
dev_err(dev, "sdhci_add_host() failed\n");
goto err_add_host;
}
/* if it is set SDHCI_QUIRK_BROKEN_CARD_DETECTION before calling
sdhci_add_host, in sdhci_add_host, MMC_CAP_NEEDS_POLL flag will
be set. The flag S3C_SDHCI_CD_PERMANENT dose not need to
detect a card by polling. */
if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT || \
pdata->cd_type == S3C_SDHCI_CD_GPIO)
host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
/* The following two methods of card detection might call
sdhci_s3c_notify_change() immediately, so they can be called
only after sdhci_add_host(). Setup errors are ignored. */
if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init) {
pdata->ext_cd_init(&sdhci_s3c_notify_change);
#ifdef CONFIG_MACH_PX
if (pdata->ext_pdev)
pdata->ext_pdev(pdev);
#endif
}
if (pdata->cd_type == S3C_SDHCI_CD_GPIO &&
gpio_is_valid(pdata->ext_cd_gpio))
sdhci_s3c_setup_card_detect_gpio(sc);
return 0;
err_add_host:
release_resource(sc->ioarea);
kfree(sc->ioarea);
err_req_regs:
for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
clk_disable(sc->clk_bus[ptr]);
clk_put(sc->clk_bus[ptr]);
}
err_no_busclks:
clk_disable(sc->clk_io);
clk_put(sc->clk_io);
err_io_clk:
sdhci_free_host(host);
return ret;
}
int diag_bridge_read(char *data, int size)
{
struct urb *urb = NULL;
unsigned int pipe;
struct diag_bridge *dev = __dev;
int ret;
int spin = 50;
struct usb_device *udev;
if (!dev || !dev->udev)
return -ENODEV;
if (!size) {
dev_err(&dev->udev->dev, "invalid size:%d\n", size);
return -EINVAL;
}
if (!dev->ifc) {
dev_err(&dev->udev->dev, "device is disconnected\n");
return -ENODEV;
}
/* if there was a previous unrecoverable error, just quit */
if (dev->err)
return -ESHUTDOWN;
while (check_request_blocked(rmnet_pm_dev) && spin--) {
pr_debug("%s: wake up wait loop\n", __func__);
msleep(20);
}
if (check_request_blocked(rmnet_pm_dev)) {
pr_err("%s: in lpa wakeup, return EAGAIN\n", __func__);
return -EAGAIN;
}
urb = usb_alloc_urb(0, GFP_KERNEL);
if (!urb) {
dev_err(&dev->udev->dev, "unable to allocate urb\n");
return -ENOMEM;
}
udev = interface_to_usbdev(dev->ifc);
/* if dev handling suspend wait for suspended or active*/
if (pm_dev_runtime_get_enabled(udev) < 0) {
usb_free_urb(urb);
return -EAGAIN;
}
ret = usb_autopm_get_interface(dev->ifc);
if (ret < 0) {
dev_err(&dev->udev->dev, "autopm_get failed:%d\n", ret);
usb_free_urb(urb);
return ret;
}
pipe = usb_rcvbulkpipe(dev->udev, dev->in_epAddr);
usb_fill_bulk_urb(urb, dev->udev, pipe, data, size,
diag_bridge_read_cb, dev);
usb_anchor_urb(urb, &dev->submitted);
dev->pending_reads++;
ret = usb_submit_urb(urb, GFP_KERNEL);
if (ret) {
dev_err(&dev->udev->dev, "submitting urb failed err:%d\n", ret);
dev->pending_reads--;
usb_unanchor_urb(urb);
usb_free_urb(urb);
usb_autopm_put_interface(dev->ifc);
return ret;
}
usb_autopm_put_interface(dev->ifc);
usb_free_urb(urb);
return 0;
}
static int midas_wm1811_init_paiftx(struct snd_soc_pcm_runtime *rtd)
{
struct snd_soc_codec *codec = rtd->codec;
struct wm1811_machine_priv *wm1811
= snd_soc_card_get_drvdata(codec->card);
struct snd_soc_dai *aif1_dai = rtd->codec_dai;
struct wm8994 *control = codec->control_data;
struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
int ret;
#ifdef SND_USE_BIAS_LEVEL
midas_aif1_dai = aif1_dai;
#endif
#ifdef CONFIG_MACH_GC1
wm1811_codec = codec;
#endif
midas_snd_set_mclk(true, false);
rtd->codec_dai->driver->playback.channels_max =
rtd->cpu_dai->driver->playback.channels_max;
ret = snd_soc_add_controls(codec, midas_controls,
ARRAY_SIZE(midas_controls));
ret = snd_soc_dapm_new_controls(&codec->dapm, midas_dapm_widgets,
ARRAY_SIZE(midas_dapm_widgets));
if (ret != 0)
dev_err(codec->dev, "Failed to add DAPM widgets: %d\n", ret);
ret = snd_soc_dapm_add_routes(&codec->dapm, midas_dapm_routes,
ARRAY_SIZE(midas_dapm_routes));
if (ret != 0)
dev_err(codec->dev, "Failed to add DAPM routes: %d\n", ret);
ret = snd_soc_dai_set_sysclk(aif1_dai, WM8994_SYSCLK_MCLK2,
MIDAS_DEFAULT_MCLK2, SND_SOC_CLOCK_IN);
if (ret < 0)
dev_err(codec->dev, "Failed to boot clocking\n");
/* Force AIF1CLK on as it will be master for jack detection */
if (wm8994->revision > 1) {
ret = snd_soc_dapm_force_enable_pin(&codec->dapm, "AIF1CLK");
if (ret < 0)
dev_err(codec->dev, "Failed to enable AIF1CLK: %d\n",
ret);
}
ret = snd_soc_dapm_disable_pin(&codec->dapm, "S5P RP");
if (ret < 0)
dev_err(codec->dev, "Failed to disable S5P RP: %d\n", ret);
snd_soc_dapm_ignore_suspend(&codec->dapm, "RCV");
snd_soc_dapm_ignore_suspend(&codec->dapm, "SPK");
snd_soc_dapm_ignore_suspend(&codec->dapm, "HP");
snd_soc_dapm_ignore_suspend(&codec->dapm, "Headset Mic");
snd_soc_dapm_ignore_suspend(&codec->dapm, "Sub Mic");
snd_soc_dapm_ignore_suspend(&codec->dapm, "Main Mic");
snd_soc_dapm_ignore_suspend(&codec->dapm, "AIF1DACDAT");
snd_soc_dapm_ignore_suspend(&codec->dapm, "AIF2DACDAT");
snd_soc_dapm_ignore_suspend(&codec->dapm, "AIF3DACDAT");
snd_soc_dapm_ignore_suspend(&codec->dapm, "AIF1ADCDAT");
snd_soc_dapm_ignore_suspend(&codec->dapm, "AIF2ADCDAT");
snd_soc_dapm_ignore_suspend(&codec->dapm, "AIF3ADCDAT");
snd_soc_dapm_ignore_suspend(&codec->dapm, "FM In");
snd_soc_dapm_ignore_suspend(&codec->dapm, "LINE");
snd_soc_dapm_ignore_suspend(&codec->dapm, "HDMI");
snd_soc_dapm_ignore_suspend(&codec->dapm, "Third Mic");
wm1811->codec = codec;
midas_micd_set_rate(codec);
#ifdef CONFIG_SEC_DEV_JACK
/* By default use idle_bias_off, will override for WM8994 */
codec->dapm.idle_bias_off = 0;
#else /* CONFIG_SEC_DEV_JACK */
wm1811->jack.status = 0;
ret = snd_soc_jack_new(codec, "Midas Jack",
SND_JACK_HEADSET | SND_JACK_BTN_0 |
SND_JACK_BTN_1 | SND_JACK_BTN_2,
&wm1811->jack);
if (ret < 0)
dev_err(codec->dev, "Failed to create jack: %d\n", ret);
ret = snd_jack_set_key(wm1811->jack.jack, SND_JACK_BTN_0, KEY_MEDIA);
if (ret < 0)
dev_err(codec->dev, "Failed to set KEY_MEDIA: %d\n", ret);
ret = snd_jack_set_key(wm1811->jack.jack, SND_JACK_BTN_1,
KEY_VOLUMEDOWN);
if (ret < 0)
dev_err(codec->dev, "Failed to set KEY_VOLUMEUP: %d\n", ret);
ret = snd_jack_set_key(wm1811->jack.jack, SND_JACK_BTN_2,
KEY_VOLUMEUP);
if (ret < 0)
dev_err(codec->dev, "Failed to set KEY_VOLUMEDOWN: %d\n", ret);
if (wm8994->revision > 1) {
dev_info(codec->dev, "wm1811: Rev %c support mic detection\n",
'A' + wm8994->revision);
ret = wm8958_mic_detect(codec, &wm1811->jack, midas_micdet,
wm1811);
if (ret < 0)
dev_err(codec->dev, "Failed start detection: %d\n",
ret);
} else {
dev_info(codec->dev, "wm1811: Rev %c doesn't support mic detection\n",
'A' + wm8994->revision);
codec->dapm.idle_bias_off = 0;
}
/* To wakeup for earjack event in suspend mode */
enable_irq_wake(control->irq);
wake_lock_init(&wm1811->jackdet_wake_lock,
WAKE_LOCK_SUSPEND, "midas_jackdet");
/* To support PBA function test */
jack_class = class_create(THIS_MODULE, "audio");
if (IS_ERR(jack_class))
pr_err("Failed to create class\n");
jack_dev = device_create(jack_class, NULL, 0, codec, "earjack");
if (device_create_file(jack_dev, &dev_attr_select_jack) < 0)
pr_err("Failed to create device file (%s)!\n",
dev_attr_select_jack.attr.name);
if (device_create_file(jack_dev, &dev_attr_key_state) < 0)
pr_err("Failed to create device file (%s)!\n",
dev_attr_key_state.attr.name);
if (device_create_file(jack_dev, &dev_attr_state) < 0)
pr_err("Failed to create device file (%s)!\n",
dev_attr_state.attr.name);
if (device_create_file(jack_dev, &dev_attr_reselect_jack) < 0)
pr_err("Failed to create device file (%s)!\n",
dev_attr_reselect_jack.attr.name);
#endif /* CONFIG_SEC_DEV_JACK */
return snd_soc_dapm_sync(&codec->dapm);
}
/**
* set_ssp_i2s_hw - configure the SSP driver according to the ps_settings
* @drv_data : structure that contains all details about the SSP Driver
* @ps_settings : structure that contains SSP Hardware settings
*
* it also store ps_settings the drv_data
*
* Output parameters
* NA
*/
static void set_ssp_i2s_hw(struct intel_mid_i2s_hdl *drv_data,
const struct intel_mid_i2s_settings *ps_settings)
{
u32 sscr0 = 0;
u32 sscr1 = 0;
u32 sstsa = 0;
u32 ssrsa = 0;
u32 sspsp = 0;
u32 sssr = 0;
/* Get the SSP Settings */
u16 l_ssp_clk_frm_mode = 0xFF;
void __iomem *reg = drv_data->ioaddr;
struct device *ddbg = &(drv_data->pdev->dev);
dev_dbg(ddbg,
"setup SSP I2S PCM1 configuration\n");
if ((ps_settings->sspsfrm_direction == SSPSFRM_MASTER_MODE)
&& (ps_settings->sspslclk_direction == SSPSCLK_MASTER_MODE)) {
l_ssp_clk_frm_mode = SSP_IN_MASTER_MODE;
} else if ((ps_settings->sspsfrm_direction == SSPSFRM_SLAVE_MODE)
&& (ps_settings->sspslclk_direction == SSPSCLK_SLAVE_MODE)) {
l_ssp_clk_frm_mode = SSP_IN_SLAVE_MODE;
} else {
dev_err(ddbg, "Unsupported I2S PCM1 configuration\n");
goto leave;
}
dev_dbg(ddbg, "SSPSFRM_DIRECTION:%d:\n",
ps_settings->sspsfrm_direction);
dev_dbg(ddbg, "SSPSCLK_DIRECTION:%d:\n",
ps_settings->sspslclk_direction);
if (ps_settings->frame_format != PSP_FORMAT) {
dev_err(ddbg, "UNSUPPORTED FRAME FORMAT:%d:\n",
ps_settings->frame_format);
goto leave;
}
if ((ps_settings->ssp_tx_dma != SSP_TX_DMA_ENABLE)
|| (ps_settings->ssp_rx_dma != SSP_RX_DMA_ENABLE)) {
dev_err(ddbg, "ONLY DMA MODE IS SUPPORTED");
goto leave;
}
/*********** DMA Transfer Mode ***********/
dev_dbg(ddbg, "FORMAT :%d:\n", ps_settings->frame_format);
sscr0 = calculate_sscr0_psp(ps_settings);
dev_dbg(ddbg, " sscr0 :0x%08X\n", sscr0);
sscr1 = calculate_sscr1_psp(ps_settings);
dev_dbg(ddbg, " sscr1 :0x%08X\n", sscr1);
if (ps_settings->mode == SSP_IN_NETWORK_MODE) {
dev_dbg(ddbg, "MODE :%d:\n", ps_settings->mode);
sscr0 |= SSCR0_reg(FRDC,
SSCR0_SlotsPerFrm(ps_settings->
frame_rate_divider_control));
dev_dbg(ddbg, "sscr0 :0x%08X\n", sscr0);
sspsp = calculate_sspsp_psp(ps_settings);
dev_dbg(ddbg, "sspsp :0x%08X\n", sspsp);
/* set the active TX time slot (bitmap) */
sstsa = SSTSA_reg(TTSA, ps_settings->ssp_active_tx_slots_map);
/* set the active RX time slot (bitmap) */
ssrsa = SSRSA_reg(RTSA, ps_settings->ssp_active_rx_slots_map);
if (l_ssp_clk_frm_mode == SSP_IN_MASTER_MODE) {
switch (ps_settings->master_mode_clk_selection) {
case SSP_ONCHIP_CLOCK:
break;
case SSP_NETWORK_CLOCK:
sscr0 |= SSCR0_reg(NCS, 1);
break;
case SSP_EXTERNAL_CLOCK:
sscr0 |= SSCR0_reg(ECS, 1);
break;
case SSP_ONCHIP_AUDIO_CLOCK:
sscr0 |= SSCR0_reg(ACS, 1);
break;
default:
dev_err(ddbg, "Master Mode clk selection UNKNOWN");
break;
}
sspsp |= SSPSP_reg(STRTDLY, ps_settings->ssp_psp_T1)
|SSPSP_reg(DMYSTRT, ps_settings->ssp_psp_T2);
} else { /* Set the Slave Clock Free Running Status */
sscr1 |= SSCR1_reg(SCFR,
ps_settings->slave_clk_free_running_status);
}
} else { /* SSP_IN_NORMAL_MODE */
dev_err(ddbg, "UNSUPPORTED MODE");
goto leave;
}
/* Clear status */
sssr = (SSSR_BCE_MASK << SSSR_BCE_SHIFT)
| (SSSR_TUR_MASK << SSSR_TUR_SHIFT)
| (SSSR_TINT_MASK << SSSR_TINT_SHIFT)
| (SSSR_PINT_MASK << SSSR_PINT_SHIFT)
| (SSSR_ROR_MASK << SSSR_ROR_SHIFT);
/* disable SSP */
clear_SSCR0_reg(reg, SSE);
dev_dbg(ddbg, "WRITE SSCR0 DISABLE\n");
/* Clear status */
write_SSSR(sssr, reg);
dev_dbg(ddbg, "WRITE SSSR: 0x%08X\n", sssr);
write_SSCR0(sscr0, reg);
dev_dbg(ddbg, "WRITE SSCR0\n");
/* first set CR1 without interrupt and service enables */
write_SSCR1(sscr1, reg);
write_SSPSP(sspsp, reg);
write_SSTSA(sstsa, reg);
write_SSRSA(ssrsa, reg);
/* set the time out for the reception */
write_SSTO(0, reg);
ssp1_dump_registers(drv_data);
leave:
return;
}
