void timer_stop(void) { int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); /* Halt timer if running - stop module clock */ stop_timer(true); restore_interrupt(oldstatus); }
bool timer_set(long cycles, bool start) { /* Maximum cycle count expressible in the cycles parameter is 2^31-1 * and the modulus counter is capable of 2^32-1 and as a result there is * no requirement to use a prescaler > 1. This gives a frequency range of * ~0.015366822Hz - 66000000Hz. The highest input frequency gives the * greatest possible accuracy anyway. */ int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); /* Halt timer if running - leave module clock enabled */ stop_timer(false); if (start && pfn_unregister != NULL) { pfn_unregister(); pfn_unregister = NULL; } /* CLKSRC = ipg_clk, * EPIT output disconnected, * Enabled in wait mode * Prescale 1 for 66MHz * Reload from modulus register, * Count from load value */ EPITCR2 = EPITCR_CLKSRC_IPG_CLK | EPITCR_WAITEN | EPITCR_IOVW | ((1-1) << EPITCR_PRESCALER_POS) | EPITCR_RLD | EPITCR_ENMOD; EPITLR2 = cycles; /* Event when counter reaches 0 */ EPITCMPR2 = 0; restore_interrupt(oldstatus); return true; }
void timer_stop(void) { int oldstatus = disable_interrupt_save(IRQ_STATUS); TCFG(4) &= ~TCFG_EN; restore_interrupt(oldstatus); }
bool timer_start(void) { int oldstatus = disable_interrupt_save(IRQ_STATUS); TCFG(4) |= TCFG_CLEAR | TCFG_IEN | TCFG_EN; restore_interrupt(oldstatus); return true; }
bool timer_start(void) { int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); /* Halt timer if running - leave module clock enabled */ stop_timer(false); /* Enable interrupt */ EPITCR2 |= EPITCR_OCIEN; avic_enable_int(INT_EPIT2, INT_TYPE_IRQ, INT_PRIO_DEFAULT, EPIT2_HANDLER); /* Start timer */ EPITCR2 |= EPITCR_EN; restore_interrupt(oldstatus); return true; }
bool timer_start(void) { int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); stop_timer(); /* enable TIMER0 clock */ bitset16(&IO_CLK_MOD2, CLK_MOD2_TMR0); /* Turn Timer0 to Free Run mode */ IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_FREE_RUN; /* enable TIMER0 interrupt */ bitset16(&IO_INTC_EINT0, INTR_EINT0_TMR0); restore_interrupt(oldstatus); return true; }
void imx233_timrot_setup(unsigned timer_nr, bool reload, unsigned count, unsigned src, unsigned prescale, bool polarity, imx233_timer_fn_t fn) { int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); /* only enable interrupt if function is set */ bool irq = fn != NULL; timer_fns[timer_nr] = fn; /* make sure we start from stop state */ HW_TIMROT_TIMCTRLn(timer_nr) = BF_OR2(TIMROT_TIMCTRLn, SELECT(BV_TIMROT_TIMCTRLn_SELECT__NEVER_TICK), UPDATE(1)); /* write count and take effect immediately with UPDATE * manual says count-1 for reload timers */ HW_TIMROT_TIMCOUNTn(timer_nr) = reload ? count - 1 : count; /* start timer */ HW_TIMROT_TIMCTRLn(timer_nr) = BF_OR6(TIMROT_TIMCTRLn, SELECT(src), PRESCALE(prescale), POLARITY(polarity), RELOAD(reload), IRQ(irq), IRQ_EN(irq)); imx233_icoll_enable_interrupt(INT_SRC_TIMER(timer_nr), irq); restore_interrupt(oldstatus); }
void timer_stop(void) { int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); stop_timer(); restore_interrupt(oldstatus); }