int __init loki_panel_init(int board_id) { int err = 0; struct resource __maybe_unused *res; struct platform_device *phost1x = NULL; struct board_info bi; #ifdef CONFIG_NVMAP_USE_CMA_FOR_CARVEOUT struct dma_declare_info vpr_dma_info; struct dma_declare_info generic_dma_info; #endif tegra_get_board_info(&bi); if ((bi.sku == BOARD_SKU_FOSTER) && (bi.board_id == BOARD_P2530)) { res = platform_get_resource_byname(&loki_disp2_device, IORESOURCE_IRQ, "irq"); res->start = INT_DISPLAY_GENERAL; res->end = INT_DISPLAY_GENERAL; res = platform_get_resource_byname(&loki_disp2_device, IORESOURCE_MEM, "regs"); res->start = TEGRA_DISPLAY_BASE; res->end = TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE - 1; loki_disp2_fb_data.xres = 1920; loki_disp2_fb_data.yres = 1080; loki_disp2_device.id = 0; loki_disp2_out.parent_clk = "pll_d"; loki_disp2_out.modes = hdmi_panel_modes; loki_disp2_out.n_modes = ARRAY_SIZE(hdmi_panel_modes); } else loki_panel_select(); #ifdef CONFIG_TEGRA_NVMAP loki_carveouts[1].base = tegra_carveout_start; loki_carveouts[1].size = tegra_carveout_size; loki_carveouts[2].base = tegra_vpr_start; loki_carveouts[2].size = tegra_vpr_size; #ifdef CONFIG_NVMAP_USE_CMA_FOR_CARVEOUT generic_dma_info.name = "generic"; generic_dma_info.base = tegra_carveout_start; generic_dma_info.size = tegra_carveout_size; generic_dma_info.resize = false; generic_dma_info.cma_dev = NULL; vpr_dma_info.name = "vpr"; vpr_dma_info.base = tegra_vpr_start; vpr_dma_info.size = tegra_vpr_size; vpr_dma_info.resize = false; vpr_dma_info.cma_dev = NULL; loki_carveouts[1].cma_dev = &tegra_generic_cma_dev; loki_carveouts[1].resize = false; loki_carveouts[2].cma_dev = &tegra_vpr_cma_dev; loki_carveouts[2].resize = true; vpr_dma_info.size = SZ_32M; vpr_dma_info.resize = true; vpr_dma_info.cma_dev = &tegra_vpr_cma_dev; vpr_dma_info.notifier.ops = &vpr_dev_ops; if (tegra_carveout_size) { err = dma_declare_coherent_resizable_cma_memory( &tegra_generic_dev, &generic_dma_info); if (err) { pr_err("Generic coherent memory declaration failed\n"); return err; } } if (tegra_vpr_size) { err = dma_declare_coherent_resizable_cma_memory( &tegra_vpr_dev, &vpr_dma_info); if (err) { pr_err("VPR coherent memory declaration failed\n"); return err; } } #endif err = platform_device_register(&loki_nvmap_device); if (err) { pr_err("nvmap device registration failed\n"); return err; } #endif phost1x = loki_host1x_init(); if (!phost1x) { pr_err("host1x devices registration failed\n"); return -EINVAL; } res = platform_get_resource_byname(&loki_disp1_device, IORESOURCE_MEM, "fbmem"); res->start = tegra_fb_start; res->end = tegra_fb_start + tegra_fb_size - 1; /* Copy the bootloader fb to the fb. */ if (tegra_bootloader_fb_size) __tegra_move_framebuffer(&loki_nvmap_device, tegra_fb_start, tegra_bootloader_fb_start, min(tegra_fb_size, tegra_bootloader_fb_size)); else __tegra_clear_framebuffer(&loki_nvmap_device, tegra_fb_start, tegra_fb_size); /* Copy the bootloader fb2 to the fb2. */ if (tegra_bootloader_fb2_size) __tegra_move_framebuffer(&loki_nvmap_device, tegra_fb2_start, tegra_bootloader_fb2_start, min(tegra_fb2_size, tegra_bootloader_fb2_size)); else __tegra_clear_framebuffer(&loki_nvmap_device, tegra_fb2_start, tegra_fb2_size); res = platform_get_resource_byname(&loki_disp2_device, IORESOURCE_MEM, "fbmem"); res->start = tegra_fb2_start; res->end = tegra_fb2_start + tegra_fb2_size - 1; loki_disp1_device.dev.parent = &phost1x->dev; if ((bi.sku != BOARD_SKU_FOSTER) || (bi.board_id != BOARD_P2530)) { err = platform_device_register(&loki_disp1_device); if (err) { pr_err("disp1 device registration failed\n"); return err; } } loki_disp2_device.dev.parent = &phost1x->dev; loki_disp2_out.hdmi_out = &loki_hdmi_out; err = platform_device_register(&loki_disp2_device); if (err) { pr_err("disp2 device registration failed\n"); return err; } return err; }
int __init ardbeg_panel_init(void) { int err = 0; struct resource __maybe_unused *res; struct platform_device *phost1x = NULL; struct board_info board_info; struct device_node *dc1_node = NULL; struct device_node *dc2_node = NULL; #ifdef CONFIG_NVMAP_USE_CMA_FOR_CARVEOUT struct dma_declare_info vpr_dma_info; struct dma_declare_info generic_dma_info; #endif find_dc_node(&dc1_node, &dc2_node); #ifndef CONFIG_TEGRA_HDMI_PRIMARY ardbeg_panel_select(); #endif #ifdef CONFIG_TEGRA_NVMAP ardbeg_carveouts[1].base = tegra_carveout_start; ardbeg_carveouts[1].size = tegra_carveout_size; ardbeg_carveouts[2].base = tegra_vpr_start; ardbeg_carveouts[2].size = tegra_vpr_size; #ifdef CONFIG_NVMAP_USE_CMA_FOR_CARVEOUT generic_dma_info.name = "generic"; generic_dma_info.base = tegra_carveout_start; generic_dma_info.size = tegra_carveout_size; generic_dma_info.resize = false; generic_dma_info.cma_dev = NULL; vpr_dma_info.name = "vpr"; vpr_dma_info.base = tegra_vpr_start; vpr_dma_info.size = tegra_vpr_size; vpr_dma_info.resize = false; vpr_dma_info.cma_dev = NULL; ardbeg_carveouts[1].cma_dev = &tegra_generic_cma_dev; ardbeg_carveouts[1].resize = false; ardbeg_carveouts[2].cma_dev = &tegra_vpr_cma_dev; ardbeg_carveouts[2].resize = true; vpr_dma_info.size = SZ_32M; vpr_dma_info.resize = true; vpr_dma_info.cma_dev = &tegra_vpr_cma_dev; vpr_dma_info.notifier.ops = &vpr_dev_ops; if (tegra_carveout_size) { err = dma_declare_coherent_resizable_cma_memory( &tegra_generic_dev, &generic_dma_info); if (err) { pr_err("Generic coherent memory declaration failed\n"); return err; } } if (tegra_vpr_size) { err = dma_declare_coherent_resizable_cma_memory( &tegra_vpr_dev, &vpr_dma_info); if (err) { pr_err("VPR coherent memory declaration failed\n"); return err; } } #endif err = platform_device_register(&ardbeg_nvmap_device); if (err) { pr_err("nvmap device registration failed\n"); return err; } #endif phost1x = ardbeg_host1x_init(); if (!phost1x) { pr_err("host1x devices registration failed\n"); return -EINVAL; } if (!of_have_populated_dt() || !dc1_node || !of_device_is_available(dc1_node)) { #ifndef CONFIG_TEGRA_HDMI_PRIMARY res = platform_get_resource_byname(&ardbeg_disp1_device, IORESOURCE_MEM, "fbmem"); #else res = platform_get_resource_byname(&ardbeg_disp2_device, IORESOURCE_MEM, "fbmem"); #endif res->start = tegra_fb_start; res->end = tegra_fb_start + tegra_fb_size - 1; } /* Copy the bootloader fb to the fb. */ if (tegra_bootloader_fb_size) __tegra_move_framebuffer(&ardbeg_nvmap_device, tegra_fb_start, tegra_bootloader_fb_start, min(tegra_fb_size, tegra_bootloader_fb_size)); else __tegra_clear_framebuffer(&ardbeg_nvmap_device, tegra_fb_start, tegra_fb_size); /* Copy the bootloader fb2 to the fb2. */ if (tegra_bootloader_fb2_size) __tegra_move_framebuffer(&ardbeg_nvmap_device, tegra_fb2_start, tegra_bootloader_fb2_start, min(tegra_fb2_size, tegra_bootloader_fb2_size)); else __tegra_clear_framebuffer(&ardbeg_nvmap_device, tegra_fb2_start, tegra_fb2_size); #ifndef CONFIG_TEGRA_HDMI_PRIMARY if (!of_have_populated_dt() || !dc1_node || !of_device_is_available(dc1_node)) { ardbeg_disp1_device.dev.parent = &phost1x->dev; err = platform_device_register(&ardbeg_disp1_device); if (err) { pr_err("disp1 device registration failed\n"); return err; } } #endif tegra_get_board_info(&board_info); switch (board_info.board_id) { case BOARD_E1991: ardbeg_hdmi_out.tmds_config = ardbeg_tn8_tmds_config2; break; case BOARD_P1761: if (board_info.fab == 3) ardbeg_hdmi_out.tmds_config = ardbeg_tn8_tmds_config2; else ardbeg_hdmi_out.tmds_config = ardbeg_tn8_tmds_config; break; case BOARD_PM359: case BOARD_E1971: case BOARD_E1973: default: /* default is ardbeg_tmds_config[] */ break; } if (!of_have_populated_dt() || !dc2_node || !of_device_is_available(dc2_node)) { #ifndef CONFIG_TEGRA_HDMI_PRIMARY res = platform_get_resource_byname(&ardbeg_disp2_device, IORESOURCE_MEM, "fbmem"); res->start = tegra_fb2_start; res->end = tegra_fb2_start + tegra_fb2_size - 1; #endif ardbeg_disp2_device.dev.parent = &phost1x->dev; err = platform_device_register(&ardbeg_disp2_device); if (err) { pr_err("disp2 device registration failed\n"); return err; } } return err; }