/** * dma_contiguous_reserve() - reserve area for contiguous memory handling * @limit: End address of the reserved memory (optional, 0 for any). * * This function reserves memory from early allocator. It should be * called by arch specific code once the early allocator (memblock or bootmem) * has been activated and all other subsystems have already allocated/reserved * memory. */ void __init dma_contiguous_reserve(phys_addr_t limit) { phys_addr_t selected_size = 0; pr_debug("%s(limit %08lx)\n", __func__, (unsigned long)limit); if (size_cmdline != -1) { selected_size = size_cmdline; } else { #ifdef CONFIG_CMA_SIZE_SEL_MBYTES selected_size = size_bytes; #elif defined(CONFIG_CMA_SIZE_SEL_PERCENTAGE) selected_size = cma_early_percent_memory(); #elif defined(CONFIG_CMA_SIZE_SEL_MIN) selected_size = min(size_bytes, cma_early_percent_memory()); #elif defined(CONFIG_CMA_SIZE_SEL_MAX) selected_size = max(size_bytes, cma_early_percent_memory()); #endif } if (selected_size) { pr_debug("%s: reserving %ld MiB for global area\n", __func__, (unsigned long)selected_size / SZ_1M); #ifdef CONFIG_ARCH_SUNXI /* ve can only use phys memory in below 256M */ dma_declare_contiguous(NULL, ion_mem.size, ion_mem.start, limit); #else dma_declare_contiguous(NULL, selected_size, 0, limit); #endif } };
void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize, phys_addr_t lbase, unsigned int lsize) { if (dma_declare_contiguous(&s5p_device_mfc_r.dev, rsize, rbase, 0)) printk(KERN_ERR "Failed to reserve memory for MFC device (%u bytes at 0x%08lx)\n", rsize, (unsigned long) rbase); if (dma_declare_contiguous(&s5p_device_mfc_l.dev, lsize, lbase, 0)) printk(KERN_ERR "Failed to reserve memory for MFC device (%u bytes at 0x%08lx)\n", rsize, (unsigned long) rbase); }
int omap4_init_camera(struct iss_platform_data *pdata, struct omap_board_data *bdata) { struct platform_device *pdev; struct omap_hwmod *oh; struct iss_platform_data *omap4iss_pdata; char *oh_name = "iss"; char *name = "omap4iss"; unsigned int id = -1; oh = omap_hwmod_lookup(oh_name); if (!oh) { pr_err("Could not look up %s\n", oh_name); return -ENODEV; } omap4iss_pdata = pdata; pdev = omap_device_build(name, id, oh, omap4iss_pdata, sizeof(struct iss_platform_data), NULL, 0, 0); if (IS_ERR(pdev)) { WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); return PTR_ERR(pdev); } oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); #ifdef CONFIG_CMA /* Create private 32MiB contiguous memory area for omap4iss device */ dma_declare_contiguous(&pdev->dev, 32*SZ_1M, 0, 0); #endif return 0; }
void __init omapdrm_reserve_vram(void) { #ifdef CONFIG_CMA /* * Create private 32MiB contiguous memory area for omapdrm.0 device * TODO revisit size.. if uc/wc buffers are allocated from CMA pages * then the amount of memory we need goes up.. */ dma_declare_contiguous(&omap_drm_device.dev, 32 * SZ_1M, 0, 0); #else # warning "CMA is not enabled, there may be limitations about scanout buffer allocations on OMAP3 and earlier" #endif }
static void __init msm7x27a_reserve(void) { reserve_info = &msm7x27a_reserve_info; memblock_remove(MSM8625_NON_CACHE_MEM, SZ_2K); memblock_remove(BOOTLOADER_BASE_ADDR, msm_ion_audio_size); msm_reserve(); #ifdef CONFIG_CMA dma_declare_contiguous( &ion_cma_device.dev, msm_ion_camera_size, CAMERA_HEAP_BASE, 0x26000000); #endif }
void __init da8xx_rproc_reserve_cma(void) { int ret; if (!rproc_base || !rproc_size) { pr_err("%s: 'rproc_mem=nn@address' badly specified\n" " 'nn' and 'address' must both be non-zero\n", __func__); return; } pr_info("%s: reserving 0x%lx @ 0x%lx...\n", __func__, rproc_size, (unsigned long)rproc_base); ret = dma_declare_contiguous(&da8xx_dsp.dev, rproc_size, rproc_base, 0); if (ret) pr_err("%s: dma_declare_contiguous failed %d\n", __func__, ret); }