示例#1
0
int cpdma_ctlr_start(struct cpdma_ctlr *ctlr)
{
	unsigned long flags;
	int i;

	spin_lock_irqsave(&ctlr->lock, flags);
	if (ctlr->state != CPDMA_STATE_IDLE) {
		spin_unlock_irqrestore(&ctlr->lock, flags);
		return -EBUSY;
	}

	if (ctlr->params.has_soft_reset) {
		unsigned timeout = 10 * 100;

		dma_reg_write(ctlr, CPDMA_SOFTRESET, 1);
		while (timeout) {
			if (dma_reg_read(ctlr, CPDMA_SOFTRESET) == 0)
				break;
			udelay(10);
			timeout--;
		}
		WARN_ON(!timeout);
	}

	for (i = 0; i < ctlr->num_chan; i++) {
		__raw_writel(0, ctlr->params.txhdp + 4 * i);
		__raw_writel(0, ctlr->params.rxhdp + 4 * i);
		__raw_writel(0, ctlr->params.txcp + 4 * i);
		__raw_writel(0, ctlr->params.rxcp + 4 * i);
	}

	dma_reg_write(ctlr, CPDMA_RXINTMASKCLEAR, 0xffffffff);
	dma_reg_write(ctlr, CPDMA_TXINTMASKCLEAR, 0xffffffff);

	dma_reg_write(ctlr, CPDMA_TXCONTROL, 1);
	dma_reg_write(ctlr, CPDMA_RXCONTROL, 1);

	ctlr->state = CPDMA_STATE_ACTIVE;

	for (i = 0; i < ARRAY_SIZE(ctlr->channels); i++) {
		if (ctlr->channels[i])
			cpdma_chan_start(ctlr->channels[i]);
	}
	spin_unlock_irqrestore(&ctlr->lock, flags);
	return 0;
}
int cpdma_ctlr_start(struct cpdma_ctlr *ctlr)
{
	rtdm_lockctx_t context;
	int i;

	rtdm_lock_get_irqsave(&ctlr->lock, context);
	if (ctlr->state != CPDMA_STATE_IDLE) {
		rtdm_lock_put_irqrestore(&ctlr->lock, context);
		return -EBUSY;
	}

	if (ctlr->params.has_soft_reset) {
		unsigned long timeout = jiffies + HZ/10;

		dma_reg_write(ctlr, CPDMA_SOFTRESET, 1);
		while (time_before(jiffies, timeout)) {
			if (dma_reg_read(ctlr, CPDMA_SOFTRESET) == 0)
				break;
		}
		WARN_ON(!time_before(jiffies, timeout));
	}

	for (i = 0; i < ctlr->num_chan; i++) {
		__raw_writel(0, ctlr->params.txhdp + 4 * i);
		__raw_writel(0, ctlr->params.rxhdp + 4 * i);
		__raw_writel(0, ctlr->params.txcp + 4 * i);
		__raw_writel(0, ctlr->params.rxcp + 4 * i);
	}

	dma_reg_write(ctlr, CPDMA_RXINTMASKCLEAR, 0xffffffff);
	dma_reg_write(ctlr, CPDMA_TXINTMASKCLEAR, 0xffffffff);

	dma_reg_write(ctlr, CPDMA_TXCONTROL, 1);
	dma_reg_write(ctlr, CPDMA_RXCONTROL, 1);

	ctlr->state = CPDMA_STATE_ACTIVE;

	for (i = 0; i < ARRAY_SIZE(ctlr->channels); i++) {
		if (ctlr->channels[i])
			cpdma_chan_start(ctlr->channels[i]);
	}
	rtdm_lock_put_irqrestore(&ctlr->lock, context);
	return 0;
}
示例#3
0
int cpdma_ctlr_dump(struct cpdma_ctlr *ctlr)
{
	struct device *dev = ctlr->dev;
	unsigned long flags;
	int i;

	spin_lock_irqsave(&ctlr->lock, flags);

	dev_info(dev, "CPDMA: state: %s", cpdma_state_str[ctlr->state]);

	dev_info(dev, "CPDMA: txidver: %x",
		 dma_reg_read(ctlr, CPDMA_TXIDVER));
	dev_info(dev, "CPDMA: txcontrol: %x",
		 dma_reg_read(ctlr, CPDMA_TXCONTROL));
	dev_info(dev, "CPDMA: txteardown: %x",
		 dma_reg_read(ctlr, CPDMA_TXTEARDOWN));
	dev_info(dev, "CPDMA: rxidver: %x",
		 dma_reg_read(ctlr, CPDMA_RXIDVER));
	dev_info(dev, "CPDMA: rxcontrol: %x",
		 dma_reg_read(ctlr, CPDMA_RXCONTROL));
	dev_info(dev, "CPDMA: softreset: %x",
		 dma_reg_read(ctlr, CPDMA_SOFTRESET));
	dev_info(dev, "CPDMA: rxteardown: %x",
		 dma_reg_read(ctlr, CPDMA_RXTEARDOWN));
	dev_info(dev, "CPDMA: txintstatraw: %x",
		 dma_reg_read(ctlr, CPDMA_TXINTSTATRAW));
	dev_info(dev, "CPDMA: txintstatmasked: %x",
		 dma_reg_read(ctlr, CPDMA_TXINTSTATMASKED));
	dev_info(dev, "CPDMA: txintmaskset: %x",
		 dma_reg_read(ctlr, CPDMA_TXINTMASKSET));
	dev_info(dev, "CPDMA: txintmaskclear: %x",
		 dma_reg_read(ctlr, CPDMA_TXINTMASKCLEAR));
	dev_info(dev, "CPDMA: macinvector: %x",
		 dma_reg_read(ctlr, CPDMA_MACINVECTOR));
	dev_info(dev, "CPDMA: maceoivector: %x",
		 dma_reg_read(ctlr, CPDMA_MACEOIVECTOR));
	dev_info(dev, "CPDMA: rxintstatraw: %x",
		 dma_reg_read(ctlr, CPDMA_RXINTSTATRAW));
	dev_info(dev, "CPDMA: rxintstatmasked: %x",
		 dma_reg_read(ctlr, CPDMA_RXINTSTATMASKED));
	dev_info(dev, "CPDMA: rxintmaskset: %x",
		 dma_reg_read(ctlr, CPDMA_RXINTMASKSET));
	dev_info(dev, "CPDMA: rxintmaskclear: %x",
		 dma_reg_read(ctlr, CPDMA_RXINTMASKCLEAR));
	dev_info(dev, "CPDMA: dmaintstatraw: %x",
		 dma_reg_read(ctlr, CPDMA_DMAINTSTATRAW));
	dev_info(dev, "CPDMA: dmaintstatmasked: %x",
		 dma_reg_read(ctlr, CPDMA_DMAINTSTATMASKED));
	dev_info(dev, "CPDMA: dmaintmaskset: %x",
		 dma_reg_read(ctlr, CPDMA_DMAINTMASKSET));
	dev_info(dev, "CPDMA: dmaintmaskclear: %x",
		 dma_reg_read(ctlr, CPDMA_DMAINTMASKCLEAR));

	if (!ctlr->params.has_ext_regs) {
		dev_info(dev, "CPDMA: dmacontrol: %x",
			 dma_reg_read(ctlr, CPDMA_DMACONTROL));
		dev_info(dev, "CPDMA: dmastatus: %x",
			 dma_reg_read(ctlr, CPDMA_DMASTATUS));
		dev_info(dev, "CPDMA: rxbuffofs: %x",
			 dma_reg_read(ctlr, CPDMA_RXBUFFOFS));
	}

	for (i = 0; i < ARRAY_SIZE(ctlr->channels); i++)
		if (ctlr->channels[i])
			cpdma_chan_dump(ctlr->channels[i]);

	spin_unlock_irqrestore(&ctlr->lock, flags);
	return 0;
}