void __init dove_init(void) { int tclk; tclk = get_tclk(); printk(KERN_INFO "Dove 88AP510 SoC, "); printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000); #ifdef CONFIG_CACHE_TAUROS2 tauros2_init(); #endif dove_setup_cpu_mbus(); dove_ge00_shared_data.t_clk = tclk; dove_uart0_data[0].uartclk = tclk; dove_uart1_data[0].uartclk = tclk; dove_uart2_data[0].uartclk = tclk; dove_uart3_data[0].uartclk = tclk; dove_spi0_data.tclk = tclk; dove_spi1_data.tclk = tclk; /* internal devices that every board has */ dove_rtc_init(); dove_xor0_init(); dove_xor1_init(); }
void __init dove_init(void) { printk(KERN_INFO "Dove 88AP510 SoC, "); printk(KERN_INFO "TCLK = %dMHz\n", (get_tclk() + 499999) / 1000000); #ifdef CONFIG_CACHE_TAUROS2 tauros2_init(); #endif dove_setup_cpu_mbus(); /* Setup root of clk tree */ clk_init(); /* internal devices that every board has */ dove_rtc_init(); dove_xor0_init(); dove_xor1_init(); }
void __init dove_init(void) { pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n", (dove_tclk + 499999) / 1000000); #ifdef CONFIG_CACHE_TAUROS2 tauros2_init(0); #endif dove_setup_cpu_wins(); /* Setup root of clk tree */ dove_clk_init(); /* internal devices that every board has */ dove_rtc_init(); dove_xor0_init(); dove_xor1_init(); }
//extern struct mbus_dram_target_info dove_mbus_dram_info; //extern int __init pxa_init_dma_wins(struct mbus_dram_target_info * dram); static void __init dove_db_init(void) { u32 dev, rev; /* * Basic Dove setup. Needs to be called early. */ dove_init(); dove_pcie_id(&dev, &rev); if (machine_is_dove_db_b() || rev >= DOVE_REV_A0) { dove_mpp_conf(dove_db_b_mpp_modes); dove_db_b_giga_phy_gpio_setup(); } else dove_mpp_conf(dove_db_mpp_modes); if ((front_panel) && (left_tact || right_tact)) { dove_mpp_conf(dove_db_tact_int_mpp_modes); i2s1_data.spdif_play = 0; } pm_power_off = dove_db_power_off; /* the (SW1) button is for use as a "wakeup" button */ dove_wakeup_button_setup(DOVE_DB_WAKEUP_GPIO); /* sdio card interrupt workaround using GPIOs */ dove_sd_card_int_wa_setup(0); dove_sd_card_int_wa_setup(1); if(front_panel) { /* JPR6 shoud be on 1-2 for touchscreen irq line */ if (dove_db_ts_gpio_setup() != 0) return; } #if defined(CONFIG_SND_DOVE_AC97) #if !defined(CONFIG_CPU_ENDIAN_BE8) /* FIXME: * we need fix __AC97(x) definition in * arch/arm/mach-dove/include/mach/pxa-regs.h * to resolve endian access. */ /* Initialize AC'97 related regs. */ dove_ac97_setup(); #endif #endif dove_rtc_init(); pxa_init_dma_wins(&dove_mbus_dram_info); pxa_init_dma(16); #ifdef CONFIG_MV_HAL_DRIVERS_SUPPORT if(useHalDrivers || useNandHal) { if (mvPdmaHalInit(MV_PDMA_MAX_CHANNELS_NUM) != MV_OK) { printk(KERN_ERR "mvPdmaHalInit() failed.\n"); BUG(); } /* reserve channels for NAND Data and command PDMA */ pxa_reserve_dma_channel(MV_PDMA_NAND_DATA); pxa_reserve_dma_channel(MV_PDMA_NAND_COMMAND); } #endif dove_xor0_init(); dove_xor1_init(); #ifdef CONFIG_MV_ETHERNET if(use_hal_giga || useHalDrivers) dove_mv_eth_init(); else #endif if (rev >= DOVE_REV_A0) dove_ge00_init(&dove_db_b_ge00_data); else dove_ge00_init(&dove_db_ge00_data); dove_ehci0_init(); dove_ehci1_init(); /* ehci init functions access the usb port, only now it's safe to disable * all clocks */ ds_clks_disable_all(0, 0); dove_sata_init(&dove_db_sata_data); dove_spi0_init(0); dove_spi1_init(1); dove_uart0_init(); dove_uart1_init(); dove_i2c_init(); dove_i2c_exp_init(0); #ifdef CONFIG_DOVE_DB_USE_GPIO_I2C dove_add_gpio_i2c(); #else dove_i2c_exp_init(1); #endif dove_sdhci_cam_mbus_init(); dove_sdio0_init(); dove_sdio1_init(); dove_db_nfc_init(); dove_db_clcd_init(); dove_vmeta_init(); dove_gpu_init(); dove_ssp_init(&dove_ssp_platform_data); dove_cesa_init(); dove_hwmon_init(); #if !defined(CONFIG_SND_DOVE_AC97) dove_i2s_init(0, &i2s0_data); #endif dove_i2s_init(1, &i2s1_data); i2c_register_board_info(0, &i2c_a2d, 1); i2c_register_board_info(0, dove_db_gpio_ext_info, 1); if (machine_is_dove_db_b() || rev >= DOVE_REV_A0) i2c_register_board_info(0, &idt, 1); if (lcd2dvi) i2c_register_board_info(0, adi9889, ARRAY_SIZE(adi9889)); spi_register_board_info(dove_db_spi_flash_info, ARRAY_SIZE(dove_db_spi_flash_info)); if (front_panel) spi_register_board_info(dove_db_spi_ts_dev, ARRAY_SIZE(dove_db_spi_ts_dev)); #ifdef CONFIG_ANDROID_PMEM android_add_pmem("pmem", 0x02000000UL, 1, 0); android_add_pmem("pmem_adsp", 0x00400000UL, 0, 0); #endif }