int32_t sprdfb_dsi_init(struct sprdfb_device *dev) { dsih_error_t result = OK; dsih_ctrl_t* dsi_instance = &(dsi_ctx.dsi_inst); dphy_t *phy = &(dsi_instance->phy_instance); struct info_mipi * mipi = dev->panel->info.mipi; __raw_bits_or((1<<0), 0x2090021c); //enable dphy FB_PRINT("sprdfb:[%s]\n", __FUNCTION__); dsi_early_int(); phy->address = DSI_CTL_BEGIN; phy->core_read_function = dsi_core_read_function; phy->core_write_function = dsi_core_write_function; phy->log_error = dsi_log_error; phy->log_info = NULL; phy->reference_freq = DSI_PHY_REF_CLOCK; dsi_instance->address = DSI_CTL_BEGIN; dsi_instance->color_mode_polarity =mipi->color_mode_pol; dsi_instance->shut_down_polarity = mipi->shut_down_pol; dsi_instance->core_read_function = dsi_core_read_function; dsi_instance->core_write_function = dsi_core_write_function; dsi_instance->log_error = dsi_log_error; dsi_instance->log_info = NULL; /*in our rtl implementation, this is max rd time, not bta time and use 15bits*/ dsi_instance->max_bta_cycles = 0x6000;//10; dsi_instance->max_hs_to_lp_cycles = 4;//110; dsi_instance->max_lp_to_hs_cycles = 15;//10; dsi_instance->max_lanes = mipi->lan_number; if(SPRDFB_MIPI_MODE_CMD == mipi->work_mode){ dsi_edpi_init(); }/*else{ dsi_dpi_init(dev->panel); }*/ /* result = mipi_dsih_unregister_all_events(dsi_instance); if(OK != result){ FB_PRINT("sprdfb: [%s]: mipi_dsih_unregister_all_events fail (%d)!\n", __FUNCTION__, result); return -1; } */ dsi_core_write_function(DSI_CTL_BEGIN, R_DSI_HOST_ERROR_MSK0, 0x1fffff); dsi_core_write_function(DSI_CTL_BEGIN, R_DSI_HOST_ERROR_MSK1, 0x3ffff); result = mipi_dsih_open(dsi_instance); if(OK != result){ FB_PRINT("sprdfb: [%s]: mipi_dsih_open fail (%d)!\n", __FUNCTION__, result); return -1; } result = mipi_dsih_dphy_configure(phy, mipi->lan_number, mipi->phy_feq); if(OK != result){ FB_PRINT("sprdfb: [%s]: mipi_dsih_dphy_configure fail (%d)!\n", __FUNCTION__, result); return -1; } while(5 != (dsi_core_read_function(DSI_CTL_BEGIN, R_DSI_HOST_PHY_STATUS) & 5)); if(SPRDFB_MIPI_MODE_CMD == mipi->work_mode){ dsi_edpi_setbuswidth(mipi); } result = mipi_dsih_enable_rx(dsi_instance, 1); if(OK != result){ FB_PRINT("sprdfb: [%s]: mipi_dsih_enable_rx fail (%d)!\n", __FUNCTION__, result); return -1; } result = mipi_dsih_ecc_rx(dsi_instance, 1); if(OK != result){ FB_PRINT("sprdfb: [%s]: mipi_dsih_ecc_rx fail (%d)!\n", __FUNCTION__, result); return -1; } result = mipi_dsih_eotp_rx(dsi_instance, 1); if(OK != result){ FB_PRINT("sprdfb: [%s]: mipi_dsih_eotp_rx fail (%d)!\n", __FUNCTION__, result); return -1; } result = mipi_dsih_eotp_tx(dsi_instance, 1); if(OK != result){ FB_PRINT("sprdfb: [%s]: mipi_dsih_eotp_tx fail (%d)!\n", __FUNCTION__, result); return -1; } if(SPRDFB_MIPI_MODE_VIDEO == mipi->work_mode){ dsi_dpi_init(dev->panel); } return 0; }
int32_t sprdfb_dsi_init(struct sprdfb_device *dev) { dsih_error_t result = OK; dsih_ctrl_t* dsi_instance = &(dsi_ctx.dsi_inst); dphy_t *phy = &(dsi_instance->phy_instance); struct info_mipi * mipi = dev->panel->info.mipi; bool resume = false; pr_debug(KERN_INFO "sprdfb:[%s]\n", __FUNCTION__); if(dev->panel_ready && dsi_ctx.is_inited){ resume = true; } if(dev->panel_ready){ dsi_ctx.is_inited = true; }else{ dsi_early_int(); } phy->address = SPRD_MIPI_DSIC_BASE; phy->core_read_function = dsi_core_read_function; phy->core_write_function = dsi_core_write_function; phy->log_error = dsi_log_error; phy->log_info = NULL; phy->reference_freq = DSI_PHY_REF_CLOCK; dsi_instance->address = SPRD_MIPI_DSIC_BASE; dsi_instance->color_mode_polarity =mipi->color_mode_pol; dsi_instance->shut_down_polarity = mipi->shut_down_pol; dsi_instance->core_read_function = dsi_core_read_function; dsi_instance->core_write_function = dsi_core_write_function; dsi_instance->log_error = dsi_log_error; dsi_instance->log_info = NULL; /*in our rtl implementation, this is max rd time, not bta time and use 15bits*/ dsi_instance->max_bta_cycles = 0x6000;//10; dsi_instance->max_hs_to_lp_cycles = 4;//110; dsi_instance->max_lp_to_hs_cycles = 15;//10; dsi_instance->max_lanes = mipi->lan_number; if(dev->panel_ready && !resume){ printk(KERN_INFO "sprdfb:[%s]: dsi has alread initialized\n", __FUNCTION__); dsi_instance->status = INITIALIZED; return 0; } if(SPRDFB_MIPI_MODE_CMD == mipi->work_mode){ dsi_edpi_init(); }/*else{ dsi_dpi_init(dev->panel); }*/ /* result = mipi_dsih_unregister_all_events(dsi_instance); if(OK != result){ printk(KERN_ERR "sprdfb: [%s]: mipi_dsih_unregister_all_events fail (%d)!\n", __FUNCTION__, result); return -1; } */ dsi_core_write_function(SPRD_MIPI_DSIC_BASE, R_DSI_HOST_ERROR_MSK0, 0x1fffff); dsi_core_write_function(SPRD_MIPI_DSIC_BASE, R_DSI_HOST_ERROR_MSK1, 0x3ffff); result = mipi_dsih_open(dsi_instance); if(OK != result){ printk(KERN_ERR "sprdfb: [%s]: mipi_dsih_open fail (%d)!\n", __FUNCTION__, result); return -1; } result = mipi_dsih_dphy_configure(phy, mipi->lan_number, mipi->phy_feq); if(OK != result){ printk(KERN_ERR "sprdfb: [%s]: mipi_dsih_dphy_configure fail (%d)!\n", __FUNCTION__, result); return -1; } while(5 != (dsi_core_read_function(SPRD_MIPI_DSIC_BASE, R_DSI_HOST_PHY_STATUS) & 5)); if(SPRDFB_MIPI_MODE_CMD == mipi->work_mode){ dsi_edpi_setbuswidth(mipi); } result = mipi_dsih_enable_rx(dsi_instance, 1); if(OK != result){ printk(KERN_ERR "sprdfb: [%s]: mipi_dsih_enable_rx fail (%d)!\n", __FUNCTION__, result); return -1; } result = mipi_dsih_ecc_rx(dsi_instance, 1); if(OK != result){ printk(KERN_ERR "sprdfb: [%s]: mipi_dsih_ecc_rx fail (%d)!\n", __FUNCTION__, result); return -1; } result = mipi_dsih_eotp_rx(dsi_instance, 1); if(OK != result){ printk(KERN_ERR "sprdfb: [%s]: mipi_dsih_eotp_rx fail (%d)!\n", __FUNCTION__, result); return -1; } result = mipi_dsih_eotp_tx(dsi_instance, 1); if(OK != result){ printk(KERN_ERR "sprdfb: [%s]: mipi_dsih_eotp_tx fail (%d)!\n", __FUNCTION__, result); return -1; } if(SPRDFB_MIPI_MODE_VIDEO == mipi->work_mode){ dsi_dpi_init(dev->panel); } return 0; }