void dss_select_clk_source(bool dsi, bool dispc) { u32 r; r = dss_read_reg(DSS_CONTROL); r = FLD_MOD(r, dsi, 1, 1); /* DSI_CLK_SWITCH */ r = FLD_MOD(r, dispc, 0, 0); /* DISPC_CLK_SWITCH */ dss_write_reg(DSS_CONTROL, r); }
void dss_sdi_init(u8 datapairs) { u32 l; BUG_ON(datapairs > 3 || datapairs < 1); l = dss_read_reg(DSS_SDI_CONTROL); l = FLD_MOD(l, 0xf, 19, 15); /* SDI_PDIV */ l = FLD_MOD(l, datapairs-1, 3, 2); /* SDI_PRSEL */ l = FLD_MOD(l, 2, 1, 0); /* SDI_BWSEL */ dss_write_reg(DSS_SDI_CONTROL, l); l = dss_read_reg(DSS_PLL_CONTROL); l = FLD_MOD(l, 0x7, 25, 22); /* SDI_PLL_FREQSEL */ l = FLD_MOD(l, 0xb, 16, 11); /* SDI_PLL_REGN */ l = FLD_MOD(l, 0xb4, 10, 1); /* SDI_PLL_REGM */ dss_write_reg(DSS_PLL_CONTROL, l); }
void dss_sdi_init(int datapairs) { u32 l; BUG_ON(datapairs > 3 || datapairs < 1); l = dss_read_reg(DSS_SDI_CONTROL); l = FLD_MOD(l, 0xf, 19, 15); /* SDI_PDIV */ l = FLD_MOD(l, datapairs-1, 3, 2); /* SDI_PRSEL */ l = FLD_MOD(l, 2, 1, 0); /* SDI_BWSEL */ dss_write_reg(DSS_SDI_CONTROL, l); l = dss_read_reg(DSS_PLL_CONTROL); l = FLD_MOD(l, 0x7, 25, 22); /* SDI_PLL_FREQSEL */ l = FLD_MOD(l, 0xb, 16, 11); /* SDI_PLL_REGN */ l = FLD_MOD(l, 0xb4, 10, 1); /* SDI_PLL_REGM */ dss_write_reg(DSS_PLL_CONTROL, l); /* Reset SDI PLL */ REG_FLD_MOD(DSS_PLL_CONTROL, 1, 18, 18); /* SDI_PLL_SYSRESET */ udelay(1); /* wait 2x PCLK */ /* Lock SDI PLL */ REG_FLD_MOD(DSS_PLL_CONTROL, 1, 28, 28); /* SDI_PLL_GOBIT */ /* Waiting for PLL lock request to complete */ while (dss_read_reg(DSS_SDI_STATUS) & (1 << 6)) ; /* Clearing PLL_GO bit */ REG_FLD_MOD(DSS_PLL_CONTROL, 0, 28, 28); /* Waiting for PLL to lock */ while (!(dss_read_reg(DSS_SDI_STATUS) & (1 << 5))) ; dispc_lcd_enable_signal(1); /* Waiting for SDI reset to complete */ while (!(dss_read_reg(DSS_SDI_STATUS) & (1 << 5))) ; }
void dss_select_clk_source(bool dsi, bool dispc) { u32 r; r = dss_read_reg(DSS_CONTROL); r = FLD_MOD(r, dsi, 1, 1); /* DSI_CLK_SWITCH */ if (cpu_is_omap44xx()) r = FLD_MOD(r, dsi, 10, 10); /* DSI2_CLK_SWITCH */ r = FLD_MOD(r, dispc, 0, 0); /* DISPC_CLK_SWITCH */ /* TODO: extend for LCD2 and HDMI */ dss_write_reg(DSS_CONTROL, r); }
void dss_select_clk_source_dsi(enum dsi lcd_ix, bool dsi, bool lcd) { u32 r; r = dss_read_reg(DSS_CONTROL); if (lcd_ix == dsi1) { r = FLD_MOD(r, dsi, 1, 1); /* DSI_CLK_SWITCH */ r = FLD_MOD(r, lcd, 0, 0); /* LCD1_CLK_SWITCH */ } else { r = FLD_MOD(r, dsi, 10, 10); /* DSI2_CLK_SWITCH */ r = FLD_MOD(r, lcd, 12, 12); /* LCD2_CLK_SWITCH */ } dss_write_reg(DSS_CONTROL, r); }