int mpc5200_psc_console_init(void *devp, struct serial_console_data *scdp)
{
	/*                                           */
	if (dt_get_virtual_reg(devp, &psc, 1) < 1)
		return -1;

	scdp->open = psc_open;
	scdp->putc = psc_putc;
	scdp->getc = psc_getc;
	scdp->tstc = psc_tstc;

	return 0;
}
示例#2
0
文件: virtex.c 项目: 0-T-0/ps4-linux
static int virtex_ns16550_console_init(void *devp)
{
	unsigned char *reg_base;
	u32 reg_shift, reg_offset, clk, spd;
	u16 divisor;
	int n;

	if (dt_get_virtual_reg(devp, (void **)&reg_base, 1) < 1)
		return -1;

	n = getprop(devp, "reg-offset", &reg_offset, sizeof(reg_offset));
	if (n == sizeof(reg_offset))
		reg_base += reg_offset;

	n = getprop(devp, "reg-shift", &reg_shift, sizeof(reg_shift));
	if (n != sizeof(reg_shift))
		reg_shift = 0;

	n = getprop(devp, "current-speed", (void *)&spd, sizeof(spd));
	if (n != sizeof(spd))
		spd = 9600;

	/* should there be a default clock rate?*/
	n = getprop(devp, "clock-frequency", (void *)&clk, sizeof(clk));
	if (n != sizeof(clk))
		return -1;

	divisor = clk / (16 * spd);

	/* Access baud rate */
	out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_DLAB);

	/* Baud rate based on input clock */
	out_8(reg_base + (UART_DLL << reg_shift), divisor & 0xFF);
	out_8(reg_base + (UART_DLM << reg_shift), divisor >> 8);

	/* 8 data, 1 stop, no parity */
	out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_WLEN8);

	/* RTS/DTR */
	out_8(reg_base + (UART_MCR << reg_shift), UART_MCR_RTS | UART_MCR_DTR);

	/* Clear transmitter and receiver */
	out_8(reg_base + (UART_FCR << reg_shift),
				UART_FCR_CLEAR_XMIT | UART_FCR_CLEAR_RCVR);
	return 0;
}
示例#3
0
int cpm_console_init(void *devp, struct serial_console_data *scdp)
{
	void *vreg[2];
	u32 reg[2];
	int is_smc = 0, is_cpm2 = 0;
	void *parent, *muram;
	void *muram_addr;
	unsigned long muram_offset, muram_size;

	if (dt_is_compatible(devp, "fsl,cpm1-smc-uart")) {
		is_smc = 1;
	} else if (dt_is_compatible(devp, "fsl,cpm2-scc-uart")) {
		is_cpm2 = 1;
	} else if (dt_is_compatible(devp, "fsl,cpm2-smc-uart")) {
		is_cpm2 = 1;
		is_smc = 1;
	}

	if (is_smc) {
		enable_port = smc_enable_port;
		disable_port = smc_disable_port;
	} else {
		enable_port = scc_enable_port;
		disable_port = scc_disable_port;
	}

	if (is_cpm2)
		do_cmd = cpm2_cmd;
	else
		do_cmd = cpm1_cmd;

	if (getprop(devp, "fsl,cpm-command", &cpm_cmd, 4) < 4)
		return -1;

	if (dt_get_virtual_reg(devp, vreg, 2) < 2)
		return -1;

	if (is_smc)
		smc = vreg[0];
	else
		scc = vreg[0];

	param = vreg[1];

	parent = get_parent(devp);
	if (!parent)
		return -1;

	if (dt_get_virtual_reg(parent, &cpcr, 1) < 1)
		return -1;

	muram = finddevice("/soc/cpm/muram/data");
	if (!muram)
		return -1;

	/* For bootwrapper-compatible device trees, we assume that the first
	 * entry has at least 128 bytes, and that #address-cells/#data-cells
	 * is one for both parent and child.
	 */

	if (dt_get_virtual_reg(muram, &muram_addr, 1) < 1)
		return -1;

	if (getprop(muram, "reg", reg, 8) < 8)
		return -1;

	muram_offset = reg[0];
	muram_size = reg[1];

	/* Store the buffer descriptors at the end of the first muram chunk.
	 * For SMC ports on CPM2-based platforms, relocate the parameter RAM
	 * just before the buffer descriptors.
	 */

	cbd_offset = muram_offset + muram_size - 2 * sizeof(struct cpm_bd);

	if (is_cpm2 && is_smc) {
		u16 *smc_base = (u16 *)param;
		u16 pram_offset;

		pram_offset = cbd_offset - 64;
		pram_offset = _ALIGN_DOWN(pram_offset, 64);

		disable_port();
		out_be16(smc_base, pram_offset);
		param = muram_addr - muram_offset + pram_offset;
	}

	cbd_addr = muram_addr - muram_offset + cbd_offset;

	scdp->open = cpm_serial_open;
	scdp->putc = cpm_serial_putc;
	scdp->getc = cpm_serial_getc;
	scdp->tstc = cpm_serial_tstc;

	return 0;
}