void
e1000_update_hw(void)
{
struct pci *pci;
struct e1000_device *e1000dev;
struct netdev *netdev;
int idx;
idx = 0;
pci = pci_list();
while ( NULL != pci ) {
if ( 0x8086 == pci->device->vendor_id ) {
switch ( pci->device->device_id ) {
case E1000_PRO1000MT:
case E1000_82545EM:
case E1000_82541PI:
case E1000_82573L:
case E1000_82567LM:
case E1000_82577LM:
case E1000_82579LM:
e1000dev = e1000_init_hw(pci->device);
netdev = netdev_add_device(e1000dev->macaddr, e1000dev);
netdev->recvpkt = e1000_recvpkt;
netdev->sendpkt = e1000_sendpkt;
idx++;
break;
default:
;
}
}
pci = pci->next;
}
}
/*
* Initialize the e1000 driver and device.
*/
static int
e1000_init(unsigned int instance, ether_addr_t * addr)
{
e1000_t *e;
int r;
e1000_instance = instance;
/* Clear state. */
memset(&e1000_state, 0, sizeof(e1000_state));
e = &e1000_state;
strlcpy(e->name, "e1000#0", sizeof(e->name));
e->name[6] += instance;
/* Perform calibration. */
if ((r = tsc_calibrate()) != OK)
panic("tsc_calibrate failed: %d", r);
/* See if we can find a matching device. */
if (!e1000_probe(e, instance))
return ENXIO;
/* Initialize the hardware, and return its ethernet address. */
e1000_init_hw(e, addr);
return OK;
}
/**
* e1000_reset - Put e1000 NIC in known initial state
*
* @v adapter e1000 private structure
**/
void e1000_reset ( struct e1000_adapter *adapter )
{
struct e1000_mac_info *mac = &adapter->hw.mac;
u32 pba = 0;
DBG ( "e1000_reset\n" );
switch (mac->type) {
case e1000_82542:
case e1000_82543:
case e1000_82544:
case e1000_82540:
case e1000_82541:
case e1000_82541_rev_2:
pba = E1000_PBA_48K;
break;
case e1000_82545:
case e1000_82545_rev_3:
case e1000_82546:
case e1000_82546_rev_3:
pba = E1000_PBA_48K;
break;
case e1000_82547:
case e1000_82547_rev_2:
pba = E1000_PBA_30K;
break;
case e1000_ep80579:
pba = E1000_PBA_48K;
break;
case e1000_undefined:
case e1000_num_macs:
break;
}
E1000_WRITE_REG ( &adapter->hw, E1000_PBA, pba );
/* Allow time for pending master requests to run */
e1000_reset_hw ( &adapter->hw );
if ( mac->type >= e1000_82544 )
E1000_WRITE_REG ( &adapter->hw, E1000_WUC, 0 );
if ( e1000_init_hw ( &adapter->hw ) )
DBG ( "Hardware Error\n" );
e1000_reset_adaptive ( &adapter->hw );
e1000_get_phy_info ( &adapter->hw );
e1000_init_manageability ( adapter );
}
/**
* e1000_reset - Put e1000 NIC in known initial state
*
* @v adapter e1000 private structure
**/
static void
e1000_reset ( struct e1000_adapter *adapter )
{
uint32_t pba = 0;
uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
DBG ( "e1000_reset\n" );
switch (adapter->hw.mac_type) {
case e1000_82542_rev2_0:
case e1000_82542_rev2_1:
case e1000_82543:
case e1000_82544:
case e1000_82540:
case e1000_82541:
case e1000_82541_rev_2:
pba = E1000_PBA_48K;
break;
case e1000_82545:
case e1000_82545_rev_3:
case e1000_82546:
case e1000_82546_rev_3:
pba = E1000_PBA_48K;
break;
case e1000_82547:
case e1000_82547_rev_2:
pba = E1000_PBA_30K;
break;
case e1000_82571:
case e1000_82572:
case e1000_80003es2lan:
pba = E1000_PBA_38K;
break;
case e1000_82573:
pba = E1000_PBA_20K;
break;
case e1000_82576:
pba = E1000_PBA_64K;
break;
case e1000_ich8lan:
pba = E1000_PBA_8K;
case e1000_undefined:
case e1000_num_macs:
break;
}
E1000_WRITE_REG ( &adapter->hw, PBA, pba );
/* flow control settings */
/* Set the FC high water mark to 90% of the FIFO size.
* Required to clear last 3 LSB */
fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
/* We can't use 90% on small FIFOs because the remainder
* would be less than 1 full frame. In this case, we size
* it to allow at least a full frame above the high water
* mark. */
if (pba < E1000_PBA_16K)
fc_high_water_mark = (pba * 1024) - 1600;
/* This actually applies to < e1000_82575, one revision less than
* e1000_82576, but e1000_82575 isn't currently defined in the code */
if (adapter->hw.mac_type < e1000_82576) {
/* 8-byte granularity */
adapter->hw.fc_high_water = fc_high_water_mark & 0xFFF8;
adapter->hw.fc_low_water = adapter->hw.fc_high_water - 8;
} else {
/* 16-byte granularity */
adapter->hw.fc_high_water = fc_high_water_mark & 0xFFF0;
adapter->hw.fc_low_water = adapter->hw.fc_high_water - 16;
}
if (adapter->hw.mac_type == e1000_80003es2lan ||
adapter->hw.mac_type == e1000_82576)
adapter->hw.fc_pause_time = 0xFFFF;
else
adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
adapter->hw.fc_send_xon = 1;
adapter->hw.fc = adapter->hw.original_fc;
/* Allow time for pending master requests to run */
e1000_reset_hw ( &adapter->hw );
if ( adapter->hw.mac_type >= e1000_82544 )
E1000_WRITE_REG ( &adapter->hw, WUC, 0 );
if ( e1000_init_hw ( &adapter->hw ) )
DBG ( "Hardware Error\n" );
/* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
if (adapter->hw.mac_type >= e1000_82544 &&
adapter->hw.mac_type <= e1000_82547_rev_2 &&
adapter->hw.autoneg == 1 &&
adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
/* clear phy power management bit if we are in gig only mode,
* which if enabled will attempt negotiation to 100Mb, which
* can cause a loss of link at power off or driver unload */
ctrl &= ~E1000_CTRL_SWDPIN3;
E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
}
e1000_phy_get_info ( &adapter->hw, &adapter->phy_info );
if (!adapter->smart_power_down &&
(adapter->hw.mac_type == e1000_82571 ||
adapter->hw.mac_type == e1000_82572)) {
uint16_t phy_data = 0;
/* speed up time to link by disabling smart power down, ignore
* the return value of this function because there is nothing
* different we would do if it failed */
e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
&phy_data);
phy_data &= ~IGP02E1000_PM_SPD;
e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
phy_data);
}
}
