/**
* e1000_shift_in_mdi_bits_82543 - Shift data bits in from the PHY
* @hw: pointer to the HW structure
*
* In order to read a register from the PHY, we need to shift 18 bits
* in from the PHY. Bits are "shifted in" by raising the clock input to
* the PHY (setting the MDC bit), and then reading the value of the data out
* MDIO bit.
**/
static u16 e1000_shift_in_mdi_bits_82543(struct e1000_hw *hw)
{
u32 ctrl;
u16 data = 0;
u8 i;
/*
* In order to read a register from the PHY, we need to shift in a
* total of 18 bits from the PHY. The first two bit (turnaround)
* times are used to avoid contention on the MDIO pin when a read
* operation is performed. These two bits are ignored by us and
* thrown away. Bits are "shifted in" by raising the input to the
* Management Data Clock (setting the MDC bit) and then reading the
* value of the MDIO bit.
*/
ctrl = E1000_READ_REG(hw, E1000_CTRL);
/*
* Clear MDIO_DIR (SWDPIO1) to indicate this bit is to be used as
* input.
*/
ctrl &= ~E1000_CTRL_MDIO_DIR;
ctrl &= ~E1000_CTRL_MDIO;
E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
E1000_WRITE_FLUSH(hw);
/*
* Raise and lower the clock before reading in the data. This accounts
* for the turnaround bits. The first clock occurred when we clocked
* out the last bit of the Register Address.
*/
e1000_raise_mdi_clk_82543(hw, &ctrl);
e1000_lower_mdi_clk_82543(hw, &ctrl);
for (data = 0, i = 0; i < 16; i++) {
data <<= 1;
e1000_raise_mdi_clk_82543(hw, &ctrl);
ctrl = E1000_READ_REG(hw, E1000_CTRL);
/* Check to see if we shifted in a "1". */
if (ctrl & E1000_CTRL_MDIO)
data |= 1;
e1000_lower_mdi_clk_82543(hw, &ctrl);
}
e1000_raise_mdi_clk_82543(hw, &ctrl);
e1000_lower_mdi_clk_82543(hw, &ctrl);
return data;
}
/**
* e1000_shift_out_mdi_bits_82543 - Shift data bits our to the PHY
* @hw: pointer to the HW structure
* @data: data to send to the PHY
* @count: number of bits to shift out
*
* We need to shift 'count' bits out to the PHY. So, the value in the
* "data" parameter will be shifted out to the PHY one bit at a time.
* In order to do this, "data" must be broken down into bits.
**/
STATIC void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data,
u16 count)
{
u32 ctrl, mask;
/*
* We need to shift "count" number of bits out to the PHY. So, the
* value in the "data" parameter will be shifted out to the PHY one
* bit at a time. In order to do this, "data" must be broken down
* into bits.
*/
mask = 0x01;
mask <<= (count - 1);
ctrl = E1000_READ_REG(hw, E1000_CTRL);
/* Set MDIO_DIR and MDC_DIR direction bits to be used as output pins. */
ctrl |= (E1000_CTRL_MDIO_DIR | E1000_CTRL_MDC_DIR);
while (mask) {
/*
* A "1" is shifted out to the PHY by setting the MDIO bit to
* "1" and then raising and lowering the Management Data Clock.
* A "0" is shifted out to the PHY by setting the MDIO bit to
* "0" and then raising and lowering the clock.
*/
if (data & mask)
ctrl |= E1000_CTRL_MDIO;
else
ctrl &= ~E1000_CTRL_MDIO;
E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
E1000_WRITE_FLUSH(hw);
usec_delay(10);
e1000_raise_mdi_clk_82543(hw, &ctrl);
e1000_lower_mdi_clk_82543(hw, &ctrl);
mask >>= 1;
}
}
