static int lcd_video_output_set(struct output_device *od)
{
unsigned long status = od->request_state;
int value;
if (status == BIT_DISPLAY_LCD_ON) {
/* open LCD */
outb(0x31, 0x3c4);
value = inb(0x3c5);
value = (value & 0xf8) | 0x03;
outb(0x31, 0x3c4);
outb(value, 0x3c5);
/* open backlight */
ec_write(REG_BACKLIGHT_CTRL, BIT_BACKLIGHT_ON);
} else {
/* close backlight */
ec_write(REG_BACKLIGHT_CTRL, BIT_BACKLIGHT_OFF);
/* close LCD */
outb(0x31, 0x3c4);
value = inb(0x3c5);
value = (value & 0xf8) | 0x02;
outb(0x31, 0x3c4);
outb(value, 0x3c5);
}
return 0;
}
int mainboard_smi_apmc(u8 data)
{
switch (data) {
case APM_CNT_ACPI_ENABLE:
/* use 0x1600/0x1604 to prevent races with userspace */
ec_set_ports(0x1604, 0x1600);
/* route EC_SCI to SCI */
gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
/* discard all events, and enable attention */
ec_write(0x80, 0x01);
break;
case APM_CNT_ACPI_DISABLE:
/* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
provide a EC query function */
ec_set_ports(0x66, 0x62);
/* route EC_SCI to SMI */
gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
/* discard all events, and enable attention */
ec_write(0x80, 0x01);
break;
default:
break;
}
return 0;
}
static void mainboard_smi_hotkey(u8 hotkey)
{
u8 reg8;
switch (hotkey) {
case 0x3b: break; // Fn+F1
case 0x3c: break; // Fn+F2
case 0x3d: break; // Fn+F3
case 0x3e: break; // Fn+F4
case 0x3f: break; // Fn+F5
case 0x40: // Fn+F6 (Decrease Display Brightness)
reg8 = ec_read(0x17);
reg8 = (reg8 > 8) ? (reg8 - 8) : 0;
ec_write(0x17, reg8);
return;
case 0x41: // Fn+F7 (Increase Display Brightness)
reg8 = ec_read(0x17);
reg8 += 8;
reg8 = (reg8 >= MAX_LCD_BRIGHTNESS) ? MAX_LCD_BRIGHTNESS : reg8;
ec_write(0x17, reg8);
return;
case 0x42: break; // Fn+F8
case 0x43: break; // Fn+F9
case 0x44: break; // Fn+F10
case 0x57: break; // Fn+F11
case 0x58: break; // Fn+F12
}
printk(BIOS_DEBUG, "EC hotkey: %02x\n", hotkey);
}
static void mainboard_enable(device_t dev)
{
device_t dev0, idedev;
/* enable Audio */
h8_set_audio_mute(0);
/* If we're resuming from suspend, blink suspend LED */
dev0 = dev_find_slot(0, PCI_DEVFN(0,0));
if (dev0 && pci_read_config32(dev0, SKPAD) == 0xcafed00d)
ec_write(0x0c, 0xc7);
idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1));
if (idedev && idedev->chip_info && dock_ultrabay_device_present()) {
struct southbridge_intel_i82801gx_config *config = idedev->chip_info;
config->ide_enable_primary = 1;
/* enable Ultrabay power */
outb(inb(0x1628) | 0x01, 0x1628);
ec_write(0x0c, 0x84);
} else {
/* disable Ultrabay power */
outb(inb(0x1628) & ~0x01, 0x1628);
ec_write(0x0c, 0x04);
}
}
int mainboard_io_trap_handler(int smif)
{
static int smm_initialized;
if (!smm_initialized) {
mainboard_smm_init();
smm_initialized = 1;
}
switch (smif) {
case SMI_DOCK_CONNECT:
ec_clr_bit(0x03, 2);
udelay(250000);
dock_connect();
ec_set_bit(0x03, 2);
/* set dock LED to indicate status */
ec_write(0x0c, 0x09);
ec_write(0x0c, 0x88);
break;
case SMI_DOCK_DISCONNECT:
ec_clr_bit(0x03, 2);
dock_disconnect();
break;
default:
return 0;
}
/* On success, the IO Trap Handler returns 1
* On failure, the IO Trap Handler returns a value != 1 */
return 1;
}
int mainboard_smi_apmc(u8 data)
{
u16 pmbase = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0x40) & 0xfffc;
u8 tmp;
printk(BIOS_DEBUG, "%s: pmbase %04X, data %02X\n", __func__, pmbase,
data);
if (!pmbase)
return 0;
switch (data) {
case APM_CNT_ACPI_ENABLE:
/* use 0x1600/0x1604 to prevent races with userspace */
ec_set_ports(0x1604, 0x1600);
/* route EC_SCI to SCI */
outw(inw(pmbase + ALT_GP_SMI_EN) & ~(1 << GPE_EC_SCI), pmbase + ALT_GP_SMI_EN);
tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
tmp &= ~0x03;
tmp |= 0x02;
pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
/* discard all events, and enable attention */
ec_write(0x80, 0x01);
break;
case APM_CNT_ACPI_DISABLE:
/* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
provide a EC query function */
ec_set_ports(0x66, 0x62);
/* route EC_SCI# to SMI */
outw(inw(pmbase + ALT_GP_SMI_EN) | (1 << GPE_EC_SCI),
pmbase + ALT_GP_SMI_EN);
tmp = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xbb);
tmp &= ~0x03;
tmp |= 0x01;
pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xbb, tmp);
/* discard all events, and enable attention */
ec_write(0x80, 0x01);
break;
case APM_CNT_FINALIZE:
printk(BIOS_DEBUG, "APMC: FINALIZE\n");
if (mainboard_finalized) {
printk(BIOS_DEBUG, "APMC#: Already finalized\n");
return 0;
}
intel_me_finalize_smm();
intel_pch_finalize_smm();
intel_sandybridge_finalize_smm();
intel_model_206ax_finalize_smm();
mainboard_finalized = 1;
break;
default:
break;
}
return 0;
}
static int set_backlight_brightness(struct backlight_device *b)
{
u8 percent = (u8) b->props.brightness;
if (percent < 0 || percent > OT_EC_BL_BRIGHTNESS_MAX)
return -EINVAL;
ec_write(OT_EC_BL_BRIGHTNESS_ADDRESS, percent);
ec_write(OT_EC_BL_CONTROL_ADDRESS, OT_EC_BL_CONTROL_ON_DATA);
return 0;
}
/* make ec enable WDD */
static void ec_enable_WDD(void)
{
unsigned char status;
udelay(EC_REG_DELAY);
status = ec_read(REG_WDTCFG);
ec_write(REG_WDT, 0x28); /* set WDT 5sec(0x28) */
ec_write(REG_WDTCFG, (status & 0x80) | 0x03);
printk(KERN_INFO "Enable WDD ok..................\n");
return;
}
/* make ec disable WDD */
static void ec_disable_WDD(void)
{
unsigned char status;
udelay(EC_REG_DELAY);
status = ec_read(REG_WDTCFG);
ec_write(REG_WDTPF, 0x03);
ec_write(REG_WDTCFG, (status & 0x80) | 0x48);
printk(KERN_INFO "Disable WDD ok..................\n");
return;
}
static void ec_setup(void)
{
/* Thermal limits? Values are from ectool's ram dump. */
ec_write(0xd1, 0x57); /* CPUH */
ec_write(0xd2, 0xc9); /* CPUL */
ec_write(0xd4, 0x64); /* SYSH */
ec_write(0xd5, 0xc9); /* SYSL */
send_ec_command(0x04); /* Set_SMI_Enable */
send_ec_command(0xab); /* Set_ACPI_Disable */
send_ec_command(0xac); /* Clr_SYS_Flag? well, why not? */
send_ec_command(0xad); /* Set_Thml_Value */
}
/* enable the chip reset mode */
static int ec_init_reset_mode(void)
{
int timeout;
unsigned char status = 0;
int ret = 0;
/* make chip goto reset mode */
ret = ec_query_seq(CMD_INIT_RESET_MODE);
if (ret < 0) {
printk(KERN_ERR "ec init reset mode failed.\n");
goto out;
}
/* make the action take active */
timeout = EC_CMD_TIMEOUT;
status = ec_read(REG_POWER_MODE) & FLAG_RESET_MODE;
while (timeout--) {
if (status) {
udelay(EC_REG_DELAY);
break;
}
status = ec_read(REG_POWER_MODE) & FLAG_RESET_MODE;
udelay(EC_REG_DELAY);
}
if (timeout <= 0) {
printk(KERN_ERR "ec rom fixup : can't check reset status.\n");
ret = -EINVAL;
} else
printk(KERN_INFO "(%d/%d)reset 0xf710 : 0x%x\n", timeout,
EC_CMD_TIMEOUT - timeout, status);
/* set MCU to reset mode */
udelay(EC_REG_DELAY);
status = ec_read(REG_PXCFG);
status |= (1 << 0);
ec_write(REG_PXCFG, status);
udelay(EC_REG_DELAY);
/* disable FWH/LPC */
udelay(EC_REG_DELAY);
status = ec_read(REG_LPCCFG);
status &= ~(1 << 7);
ec_write(REG_LPCCFG, status);
udelay(EC_REG_DELAY);
printk(KERN_INFO "entering reset mode ok..............\n");
out:
return ret;
}
/* make ec exit from reset mode */
static void ec_exit_reset_mode(void)
{
unsigned char regval;
udelay(EC_REG_DELAY);
regval = ec_read(REG_LPCCFG);
regval |= (1 << 7);
ec_write(REG_LPCCFG, regval);
regval = ec_read(REG_PXCFG);
regval &= ~(1 << 0);
ec_write(REG_PXCFG, regval);
printk(KERN_INFO "exit reset mode ok..................\n");
return;
}
void ml2f_reboot(void)
{
reset_cpu();
/* sending an reset signal to EC(embedded controller) */
ec_write(REG_RESET, BIT_RESET_ON);
}
static ssize_t acpi_ec_write_io(struct file *f, const char __user *buf,
size_t count, loff_t *off)
{
/* Use this if support reading/writing multiple ECs exists in ec.c:
* struct acpi_ec *ec = ((struct seq_file *)f->private_data)->private;
*/
unsigned int size = count;
loff_t init_off = *off;
u8 *data = (u8 *) buf;
int err = 0;
if (*off >= EC_SPACE_SIZE)
return 0;
if (*off + count >= EC_SPACE_SIZE) {
size = EC_SPACE_SIZE - *off;
count = size;
}
while (size) {
u8 byte_write = data[*off - init_off];
err = ec_write(*off, byte_write);
if (err)
return err;
*off += 1;
size--;
}
return count;
}
static int acpi_ec_sbs_write(struct acpi_sbs *sbs, u8 address, u8 data)
{
int err;
err = ec_write(sbs->base + address, data);
return (err);
}
static void mainboard_enable(device_t dev)
{
device_t dev0;
u16 pmbase;
dev->ops->init = mainboard_init;
dev->ops->acpi_fill_ssdt_generator = fill_ssdt;
pmbase = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)),
PMBASE) & 0xff80;
printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", pmbase);
outl(0, pmbase + SMI_EN);
enable_lapic();
pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_BASE,
DEFAULT_GPIOBASE | 1);
pci_write_config8(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_CNTL,
0x10);
/* If we're resuming from suspend, blink suspend LED */
dev0 = dev_find_slot(0, PCI_DEVFN(0, 0));
if (dev0 && pci_read_config32(dev0, SKPAD) == SKPAD_ACPI_S3_MAGIC)
ec_write(0x0c, 0xc7);
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_LFP, 2);
}
static int omnibook_ec_write(const struct omnibook_operation *io_op, u8 data)
{
int retval;
#ifdef CONFIG_ACPI_EC
if (likely(!acpi_disabled)) {
retval = ec_write((u8) io_op->write_addr, data);
// dprintk("ACPI EC write at %lx success %i.\n", io_op->write_addr, retval);
return retval;
}
#endif
spin_lock_irq(&omnibook_ec_lock);
retval = omnibook_ec_wait(OMNIBOOK_EC_STAT_IBF);
if (retval)
goto end;
outb(OMNIBOOK_EC_CMD_WRITE, OMNIBOOK_EC_SC);
retval = omnibook_ec_wait(OMNIBOOK_EC_STAT_IBF);
if (retval)
goto end;
outb((u8) io_op->write_addr, OMNIBOOK_EC_DATA);
retval = omnibook_ec_wait(OMNIBOOK_EC_STAT_IBF);
if (retval)
goto end;
outb(data, OMNIBOOK_EC_DATA);
end:
spin_unlock_irq(&omnibook_ec_lock);
// dprintk("Custom EC write at %lx success %i.\n", io_op->write_addr, retval);
return retval;
}
static int acpi_ec_smb_write(struct acpi_ec_smbus *smbus, u8 address, u8 data)
{
int err;
err = ec_write(smbus->base + address, data);
return (err);
}
static void mainboard_enable(device_t dev)
{
device_t dev0;
u16 pmbase;
dev->ops->init = mainboard_init;
pmbase = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)),
PMBASE) & 0xff80;
printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", pmbase);
outl(0, pmbase + SMI_EN);
enable_lapic();
pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_BASE,
DEFAULT_GPIOBASE | 1);
pci_write_config8(dev_find_slot(0, PCI_DEVFN(0x1f, 0)), GPIO_CNTL,
0x10);
/* If we're resuming from suspend, blink suspend LED */
dev0 = dev_find_slot(0, PCI_DEVFN(0, 0));
if (dev0 && pci_read_config32(dev0, SKPAD) == SKPAD_ACPI_S3_MAGIC)
ec_write(0x0c, 0xc7);
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL || CONFIG_PCI_OPTION_ROM_RUN_REALMODE
/* Install custom int15 handler for VGA OPROM */
mainboard_interrupt_handlers(0x15, &int15_handler);
#endif
verb_setup();
}
static void mainboard_init(device_t dev)
{
RCBA32(0x38c8) = 0x00002005;
RCBA32(0x38c4) = 0x00802005;
RCBA32(0x38c0) = 0x00000007;
/* FIXME: trim this down or remove if necessary */
{
int i;
const u8 dmp[256] = {
/* 00 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 10 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 20 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 70 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* 90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* a0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* b0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* c0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* d0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* e0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* f0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
};
printk(BIOS_DEBUG, "Replaying EC dump ...");
for (i = 0; i < 256; i++)
ec_write (i, dmp[i]);
printk(BIOS_DEBUG, "done\n");
}
pc_keyboard_init();
}
static void wilco_ec_init(struct device *dev)
{
if (!dev->enabled)
return;
/* Disable S0ix support in EC RAM with ACPI EC interface */
if (!acpi_is_wakeup_s3()) {
ec_set_ports(CONFIG_EC_BASE_ACPI_COMMAND,
CONFIG_EC_BASE_ACPI_DATA);
ec_write(EC_RAM_S0IX_SUPPORT, 0);
}
/* Print EC firmware information */
wilco_ec_print_all_info();
/* Initialize keyboard, ignore emulated PS/2 mouse */
pc_keyboard_init(NO_AUX_DEVICE);
/* Direct power button to the host for processing */
wilco_ec_send(KB_POWER_BUTTON_TO_HOST, 1);
/* Unmute speakers */
wilco_ec_send(KB_HW_MUTE_CONTROL, AUDIO_UNMUTE_125MS);
/* Enable WiFi radio */
wilco_ec_radio_control(RADIO_WIFI, 1);
/* Turn on camera power */
wilco_ec_send(KB_CAMERA, CAMERA_ON);
}
static int load_scm_model_init(struct platform_device *sdev)
{
u8 data;
int result;
/* allow userland write sysfs file */
dev_attr_bluetooth.store = store_bluetooth;
dev_attr_wlan.store = store_wlan;
dev_attr_threeg.store = store_threeg;
dev_attr_bluetooth.attr.mode |= S_IWUSR;
dev_attr_wlan.attr.mode |= S_IWUSR;
dev_attr_threeg.attr.mode |= S_IWUSR;
/* disable hardware control by fn key */
result = ec_read(MSI_STANDARD_EC_SCM_LOAD_ADDRESS, &data);
if (result < 0)
return result;
result = ec_write(MSI_STANDARD_EC_SCM_LOAD_ADDRESS,
data | MSI_STANDARD_EC_SCM_LOAD_MASK);
if (result < 0)
return result;
/* initial rfkill */
result = rfkill_init(sdev);
if (result < 0)
return result;
return 0;
}
static ssize_t set_device_state(const char *buf, size_t count, u8 mask)
{
int status;
u8 wdata = 0, rdata;
int result;
if (sscanf(buf, "%i", &status) != 1 || (status < 0 || status > 1))
return -EINVAL;
/* read current device state */
result = ec_read(MSI_STANDARD_EC_COMMAND_ADDRESS, &rdata);
if (result < 0)
return -EINVAL;
if (!!(rdata & mask) != status) {
/* reverse device bit */
if (rdata & mask)
wdata = rdata & ~mask;
else
wdata = rdata | mask;
result = ec_write(MSI_STANDARD_EC_COMMAND_ADDRESS, wdata);
if (result < 0)
return -EINVAL;
}
return count;
}
static void mainboard_init(device_t dev)
{
device_t dev0, idedev, sdhci_dev;
ec_clr_bit(0x03, 2);
if (inb(0x164c) & 0x08) {
ec_set_bit(0x03, 2);
ec_write(0x0c, 0x88);
}
#if CONFIG_PCI_OPTION_ROM_RUN_YABEL || CONFIG_PCI_OPTION_ROM_RUN_REALMODE
/* Install custom int15 handler for VGA OPROM */
mainboard_interrupt_handlers(0x15, &int15_handler);
#endif
/* If we're resuming from suspend, blink suspend LED */
dev0 = dev_find_slot(0, PCI_DEVFN(0,0));
if (dev0 && pci_read_config32(dev0, SKPAD) == SKPAD_ACPI_S3_MAGIC)
ec_write(0x0c, 0xc7);
idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1));
if (idedev && idedev->chip_info && dock_ultrabay_device_present()) {
struct southbridge_intel_i82801gx_config *config = idedev->chip_info;
config->ide_enable_primary = 1;
/* enable Ultrabay power */
outb(inb(0x1628) | 0x01, 0x1628);
ec_write(0x0c, 0x84);
} else {
/* disable Ultrabay power */
outb(inb(0x1628) & ~0x01, 0x1628);
ec_write(0x0c, 0x04);
}
/* Set SDHCI write protect polarity "SDWPPol" */
sdhci_dev = dev_find_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C822, 0);
if (sdhci_dev) {
if (pci_read_config8(sdhci_dev, 0xfa) != 0x20) {
/* unlock */
pci_write_config8(sdhci_dev, 0xf9, 0xfc);
/* set SDWPPol, keep CLKRUNDis, SDPWRPol clear */
pci_write_config8(sdhci_dev, 0xfa, 0x20);
/* restore lock */
pci_write_config8(sdhci_dev, 0xf9, 0x00);
}
}
}
static void mainboard_enable(device_t dev)
{
device_t dev0, idedev;
u8 defaults_loaded = 0;
ec_clr_bit(0x03, 2);
if (inb(0x164c) & 0x08) {
ec_set_bit(0x03, 2);
ec_write(0x0c, 0x88);
}
/* If we're resuming from suspend, blink suspend LED */
dev0 = dev_find_slot(0, PCI_DEVFN(0,0));
if (dev0 && pci_read_config32(dev0, SKPAD) == SKPAD_ACPI_S3_MAGIC)
ec_write(0x0c, 0xc7);
idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1));
if (idedev && idedev->chip_info && dock_ultrabay_device_present()) {
struct southbridge_intel_i82801gx_config *config = idedev->chip_info;
config->ide_enable_primary = 1;
/* enable Ultrabay power */
outb(inb(0x1628) | 0x01, 0x1628);
ec_write(0x0c, 0x84);
} else {
/* disable Ultrabay power */
outb(inb(0x1628) & ~0x01, 0x1628);
ec_write(0x0c, 0x04);
}
if (get_option(&defaults_loaded, "cmos_defaults_loaded") < 0) {
printk(BIOS_INFO, "failed to get cmos_defaults_loaded");
defaults_loaded = 0;
}
if (!defaults_loaded) {
printk(BIOS_INFO, "Restoring CMOS defaults\n");
set_option("tft_brightness", &(u8[]) {
0xff
});
set_option("volume", &(u8[]) {
0x03
});
set_option("cmos_defaults_loaded", &(u8[]) {
0x01
});
}
void ec_it8518_enable_wake_events(void)
{
/*
* Set the bit in ECRAM that will enable the Lid switch as a wake source
*/
u8 reg8 = ec_read(EC_WAKE_SRC_ENABLE);
ec_write(EC_WAKE_SRC_ENABLE, reg8 | EC_LID_WAKE_ENABLE);
}
static int set_lcd_level(int level)
{
if (level < 0 || level >= COMPAL_LCD_LEVEL_MAX)
return -EINVAL;
ec_write(COMPAL_EC_COMMAND_LCD_LEVEL, level);
return 0;
}
static void set_fan_pwm(int value)
{
int status, mode;
mode = ec_read(REG_FAN_AUTO_MAN_SWITCH);
if (mode != BIT_FAN_MANUAL)
return;
value = SENSORS_LIMIT(value, MIN_FAN_SPEED, MAX_FAN_SPEED);
/* If value is not ZERO, We should ensure it is on */
if (value != 0) {
status = ec_read(REG_FAN_STATUS);
if (status == 0)
ec_write(REG_FAN_CONTROL, BIT_FAN_CONTROL_ON);
}
ec_write(REG_FAN_SPEED_LEVEL, value);
}
static void set_fan_pwm_enable(int mode)
{
switch (mode) {
case 0:
/* fullspeed */
ec_write(REG_FAN_AUTO_MAN_SWITCH, BIT_FAN_MANUAL);
ec_write(REG_FAN_SPEED_LEVEL, MAX_FAN_SPEED);
break;
case 1:
ec_write(REG_FAN_AUTO_MAN_SWITCH, BIT_FAN_MANUAL);
break;
case 2:
ec_write(REG_FAN_AUTO_MAN_SWITCH, BIT_FAN_AUTO);
break;
default:
break;
}
}
/* start the action to spi rom function */
static void ec_start_spi(void)
{
unsigned char val;
delay_spi(SPI_FINISH_WAIT_TIME);
val = ec_read(REG_XBISPICFG) | SPICFG_EN_SPICMD | SPICFG_AUTO_CHECK;
ec_write(REG_XBISPICFG, val);
delay_spi(SPI_FINISH_WAIT_TIME);
}
