/*
* Device timeout/watchdog routine. Entered if the device neglects to
* generate an interrupt after a transmit has been started on it.
*/
static void
ed_watchdog(struct ed_softc *sc)
{
struct ifnet *ifp;
ifp = sc->ifp;
log(LOG_ERR, "%s: device timeout\n", ifp->if_xname);
ifp->if_oerrors++;
ed_reset(ifp);
}
/*
* Device timeout/watchdog routine. Entered if the device neglects to
* generate an interrupt after a transmit has been started on it.
*/
static void
ed_watchdog(struct ed_softc *sc)
{
struct ifnet *ifp;
ifp = sc->ifp;
log(LOG_ERR, "%s: device timeout\n", ifp->if_xname);
if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
ed_reset(ifp);
}
/*
* Ethernet interface interrupt processor
*/
void
edintr(void *arg)
{
struct ed_softc *sc = (struct ed_softc*) arg;
struct ifnet *ifp = sc->ifp;
u_char isr;
int count;
ED_LOCK(sc);
if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
ED_UNLOCK(sc);
return;
}
/*
* Set NIC to page 0 registers
*/
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
/*
* loop until there are no more new interrupts. When the card goes
* away, the hardware will read back 0xff. Looking at the interrupts,
* it would appear that 0xff is impossible, or at least extremely
* unlikely.
*/
while ((isr = ed_nic_inb(sc, ED_P0_ISR)) != 0 && isr != 0xff) {
/*
* reset all the bits that we are 'acknowledging' by writing a
* '1' to each bit position that was set (writing a '1'
* *clears* the bit)
*/
ed_nic_outb(sc, ED_P0_ISR, isr);
/*
* The AX88190 and AX88190A has problems acking an interrupt
* and having them clear. This interferes with top-level loop
* here. Wait for all the bits to clear.
*
* We limit this to 5000 iterations. At 1us per inb/outb,
* this translates to about 15ms, which should be plenty of
* time, and also gives protection in the card eject case.
*/
if (sc->chip_type == ED_CHIP_TYPE_AX88190) {
count = 5000; /* 15ms */
while (count-- && (ed_nic_inb(sc, ED_P0_ISR) & isr)) {
ed_nic_outb(sc, ED_P0_ISR,0);
ed_nic_outb(sc, ED_P0_ISR,isr);
}
if (count == 0)
break;
}
/*
* Handle transmitter interrupts. Handle these first because
* the receiver will reset the board under some conditions.
*/
if (isr & (ED_ISR_PTX | ED_ISR_TXE)) {
u_char collisions = ed_nic_inb(sc, ED_P0_NCR) & 0x0f;
/*
* Check for transmit error. If a TX completed with an
* error, we end up throwing the packet away. Really
* the only error that is possible is excessive
* collisions, and in this case it is best to allow
* the automatic mechanisms of TCP to backoff the
* flow. Of course, with UDP we're screwed, but this
* is expected when a network is heavily loaded.
*/
(void) ed_nic_inb(sc, ED_P0_TSR);
if (isr & ED_ISR_TXE) {
u_char tsr;
/*
* Excessive collisions (16)
*/
tsr = ed_nic_inb(sc, ED_P0_TSR);
if ((tsr & ED_TSR_ABT)
&& (collisions == 0)) {
/*
* When collisions total 16, the
* P0_NCR will indicate 0, and the
* TSR_ABT is set.
*/
collisions = 16;
sc->mibdata.dot3StatsExcessiveCollisions++;
sc->mibdata.dot3StatsCollFrequencies[15]++;
}
if (tsr & ED_TSR_OWC)
sc->mibdata.dot3StatsLateCollisions++;
if (tsr & ED_TSR_CDH)
sc->mibdata.dot3StatsSQETestErrors++;
if (tsr & ED_TSR_CRS)
sc->mibdata.dot3StatsCarrierSenseErrors++;
if (tsr & ED_TSR_FU)
sc->mibdata.dot3StatsInternalMacTransmitErrors++;
/*
* update output errors counter
*/
ifp->if_oerrors++;
} else {
/*
* Update total number of successfully
* transmitted packets.
*/
ifp->if_opackets++;
}
/*
* reset tx busy and output active flags
*/
sc->xmit_busy = 0;
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
/*
* clear watchdog timer
*/
sc->tx_timer = 0;
/*
* Add in total number of collisions on last
* transmission.
*/
ifp->if_collisions += collisions;
switch(collisions) {
case 0:
case 16:
break;
case 1:
sc->mibdata.dot3StatsSingleCollisionFrames++;
sc->mibdata.dot3StatsCollFrequencies[0]++;
break;
default:
sc->mibdata.dot3StatsMultipleCollisionFrames++;
sc->mibdata.
dot3StatsCollFrequencies[collisions-1]
++;
break;
}
/*
* Decrement buffer in-use count if not zero (can only
* be zero if a transmitter interrupt occured while
* not actually transmitting). If data is ready to
* transmit, start it transmitting, otherwise defer
* until after handling receiver
*/
if (sc->txb_inuse && --sc->txb_inuse)
ed_xmit(sc);
}
/*
* Handle receiver interrupts
*/
if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) {
/*
* Overwrite warning. In order to make sure that a
* lockup of the local DMA hasn't occurred, we reset
* and re-init the NIC. The NSC manual suggests only a
* partial reset/re-init is necessary - but some chips
* seem to want more. The DMA lockup has been seen
* only with early rev chips - Methinks this bug was
* fixed in later revs. -DG
*/
if (isr & ED_ISR_OVW) {
ifp->if_ierrors++;
#ifdef DIAGNOSTIC
log(LOG_WARNING,
"%s: warning - receiver ring buffer overrun\n",
ifp->if_xname);
#endif
/*
* Stop/reset/re-init NIC
*/
ed_reset(ifp);
} else {
/*
* Receiver Error. One or more of: CRC error,
* frame alignment error FIFO overrun, or
* missed packet.
*/
if (isr & ED_ISR_RXE) {
u_char rsr;
rsr = ed_nic_inb(sc, ED_P0_RSR);
if (rsr & ED_RSR_CRC)
sc->mibdata.dot3StatsFCSErrors++;
if (rsr & ED_RSR_FAE)
sc->mibdata.dot3StatsAlignmentErrors++;
if (rsr & ED_RSR_FO)
sc->mibdata.dot3StatsInternalMacReceiveErrors++;
ifp->if_ierrors++;
#ifdef ED_DEBUG
if_printf(ifp, "receive error %x\n",
ed_nic_inb(sc, ED_P0_RSR));
#endif
}
/*
* Go get the packet(s) XXX - Doing this on an
* error is dubious because there shouldn't be
* any data to get (we've configured the
* interface to not accept packets with
* errors).
*/
/*
* Enable 16bit access to shared memory first
* on WD/SMC boards.
*/
ed_enable_16bit_access(sc);
ed_rint(sc);
ed_disable_16bit_access(sc);
}
}
/*
* If it looks like the transmitter can take more data,
* attempt to start output on the interface. This is done
* after handling the receiver to give the receiver priority.
*/
if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0)
ed_start_locked(ifp);
/*
* return NIC CR to standard state: page 0, remote DMA
* complete, start (toggling the TXP bit off, even if was just
* set in the transmit routine, is *okay* - it is 'edge'
* triggered from low to high)
*/
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
/*
* If the Network Talley Counters overflow, read them to reset
* them. It appears that old 8390's won't clear the ISR flag
* otherwise - resulting in an infinite loop.
*/
if (isr & ED_ISR_CNT) {
(void) ed_nic_inb(sc, ED_P0_CNTR0);
(void) ed_nic_inb(sc, ED_P0_CNTR1);
(void) ed_nic_inb(sc, ED_P0_CNTR2);
}
}
ED_UNLOCK(sc);
}
/*
* Ethernet interface receiver interrupt.
*/
static __inline void
ed_rint(struct ed_softc *sc)
{
struct ifnet *ifp = sc->ifp;
u_char boundry;
u_short len;
struct ed_ring packet_hdr;
bus_size_t packet_ptr;
ED_ASSERT_LOCKED(sc);
/*
* Set NIC to page 1 registers to get 'current' pointer
*/
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
/*
* 'sc->next_packet' is the logical beginning of the ring-buffer -
* i.e. it points to where new data has been buffered. The 'CURR'
* (current) register points to the logical end of the ring-buffer -
* i.e. it points to where additional new data will be added. We loop
* here until the logical beginning equals the logical end (or in
* other words, until the ring-buffer is empty).
*/
while (sc->next_packet != ed_nic_inb(sc, ED_P1_CURR)) {
/* get pointer to this buffer's header structure */
packet_ptr = sc->mem_ring +
(sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE;
/*
* The byte count includes a 4 byte header that was added by
* the NIC.
*/
sc->readmem(sc, packet_ptr, (char *) &packet_hdr,
sizeof(packet_hdr));
len = packet_hdr.count;
if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring)) ||
len < (ETHER_MIN_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring))) {
/*
* Length is a wild value. There's a good chance that
* this was caused by the NIC being old and buggy.
* The bug is that the length low byte is duplicated
* in the high byte. Try to recalculate the length
* based on the pointer to the next packet. Also,
* need ot preserve offset into page.
*
* NOTE: sc->next_packet is pointing at the current
* packet.
*/
len &= ED_PAGE_SIZE - 1;
if (packet_hdr.next_packet >= sc->next_packet)
len += (packet_hdr.next_packet -
sc->next_packet) * ED_PAGE_SIZE;
else
len +=
((packet_hdr.next_packet - sc->rec_page_start) +
(sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE;
/*
* because buffers are aligned on 256-byte boundary,
* the length computed above is off by 256 in almost
* all cases. Fix it...
*/
if (len & 0xff)
len -= 256;
if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN
+ sizeof(struct ed_ring)))
sc->mibdata.dot3StatsFrameTooLongs++;
}
/*
* Be fairly liberal about what we allow as a "reasonable"
* length so that a [crufty] packet will make it to BPF (and
* can thus be analyzed). Note that all that is really
* important is that we have a length that will fit into one
* mbuf cluster or less; the upper layer protocols can then
* figure out the length from their own length field(s). But
* make sure that we have at least a full ethernet header or
* we would be unable to call ether_input() later.
*/
if ((len >= sizeof(struct ed_ring) + ETHER_HDR_LEN) &&
(len <= MCLBYTES) &&
(packet_hdr.next_packet >= sc->rec_page_start) &&
(packet_hdr.next_packet < sc->rec_page_stop)) {
/*
* Go get packet.
*/
ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring),
len - sizeof(struct ed_ring));
ifp->if_ipackets++;
} else {
/*
* Really BAD. The ring pointers are corrupted.
*/
log(LOG_ERR,
"%s: NIC memory corrupt - invalid packet length %d\n",
ifp->if_xname, len);
ifp->if_ierrors++;
ed_reset(ifp);
return;
}
/*
* Update next packet pointer
*/
sc->next_packet = packet_hdr.next_packet;
/*
* Update NIC boundry pointer - being careful to keep it one
* buffer behind. (as recommended by NS databook)
*/
boundry = sc->next_packet - 1;
if (boundry < sc->rec_page_start)
boundry = sc->rec_page_stop - 1;
/*
* Set NIC to page 0 registers to update boundry register
*/
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
ed_nic_outb(sc, ED_P0_BNRY, boundry);
/*
* Set NIC to page 1 registers before looping to top (prepare
* to get 'CURR' current pointer)
*/
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
}
}
