示例#1
0
void efhw_keventq_dtor(struct efhw_nic *nic, struct efhw_keventq *evq)
{
	EFHW_ASSERT(evq);

	EFHW_TRACE("%s: [%d]", __FUNCTION__, evq->instance);

	/* Zero the timer-value for this queue.
	   And Tell NIC to stop using this event queue. */
	efhw_nic_event_queue_disable(nic, evq->instance, 0);

	/* free the pages used by the eventq itself */
	efhw_iopages_free(nic, &evq->hw.iobuff);
}
示例#2
0
文件: eventq.c 项目: ido/openonload
void efhw_keventq_dtor(struct efhw_nic *nic, struct efhw_keventq *evq)
{
	int order = EFHW_GFP_ORDER_TO_NIC_ORDER(get_order(evq->hw.capacity *
							  sizeof(efhw_event_t)));
	EFHW_ASSERT(evq);

	EFHW_TRACE("%s: [%d]", __FUNCTION__, evq->instance);

	/* Zero the timer-value for this queue.
	   And Tell NIC to stop using this event queue. */
	efhw_nic_event_queue_disable(nic, evq->instance,
				     0 /* not used on falcon */);

	/* Free buftable entries */
	efhw_nic_buffer_table_clear(nic, evq->hw.bt_block, 0,
                              1 << order);
	efhw_nic_buffer_table_free(nic, evq->hw.bt_block);

	/* free the pages used by the eventq itself */
	efhw_iopages_free(nic->pci_dev, &evq->hw.iobuff, NULL);
}
示例#3
0
void efrm_eventq_reset(struct efrm_vi *virs)
{
	struct efhw_nic *nic = virs->rs.rs_client->nic;
	struct efrm_nic *efrm_nic = container_of(nic, struct efrm_nic,
						 efhw_nic);
	int instance = virs->rs.rs_instance;
	int wakeup_evq;

	EFRM_ASSERT(virs->q[EFHW_EVQ].capacity != 0);

	/* FIXME: Protect against concurrent resets. */

	efhw_nic_event_queue_disable(nic, instance,
				  (virs->flags & EFHW_VI_RX_TIMESTAMPS) != 0);

	wakeup_evq = virs->net_drv_wakeup_channel >= 0?
		virs->net_drv_wakeup_channel:
		efrm_nic->rss_channel_count == 0?
		0:
		instance % efrm_nic->rss_channel_count;
	memset(efrm_eventq_base(virs), EFHW_CLEAR_EVENT_VALUE,
	       efrm_vi_rm_evq_bytes(virs, -1));
	virs->out_flags = 0;
	/* NB. We do not enable DOS protection because of bug12916. */
	efhw_nic_event_queue_enable(nic, instance, virs->q[EFHW_EVQ].capacity,
			efrm_bt_allocation_base(&virs->q[EFHW_EVQ].bt_alloc),
			virs->q[EFHW_EVQ].dma_addrs, 
			1 << virs->q[EFHW_EVQ].page_order,
				    /* make siena look like falcon for now */
				    instance < 64, 
				    0, wakeup_evq,
				    (virs->flags &
				     (EFHW_VI_RX_TIMESTAMPS |
				      EFHW_VI_TX_TIMESTAMPS)) != 0,
				    (virs->flags &
				     EFHW_VI_NO_CUT_THROUGH) == 0,
				    &virs->rx_ts_correction,
				    &virs->out_flags);
}