int mdaq_pwm_stop(uint8_t channel)
{
#if (!defined MATLAB_MEX_FILE) && (!defined MDL_REF_SIM_TGT)
mdaq_pwm_set_duty(channel, 0);
return ehrpwm_pwm_stop(channel);
#endif
}
int ehrpwm_pwm_suspend(struct pwm_device *p, enum config_mask config_mask,
unsigned long val)
{
unsigned long long req_cycles = 0;
if (!p->period_ns)
return -EINVAL;
ehrpwm_pwm_stop(p);
/* Calculate the delay in terms of cycles */
if (config_mask == CONFIG_NS)
req_cycles = val / p->period_ns;
else if (config_mask == CONFIG_TICKS)
req_cycles = val;
else
return -EINVAL;
/* Configute the event interrupt */
ehrpwm_et_set_sel_evt(p, 0x2, 0x1);
ehrpwm_suspend_params.pch = p;
ehrpwm_suspend_params.req_delay_cycles = req_cycles;
ehrpwm_suspend_params.act_delay = 0;
ehrpwm_et_cb_register(p, &ehrpwm_suspend_params,
ehrpwm_pwm_suspend_cb);
ehrpwm_et_int_en_dis(p, ENABLE);
return 0;
}
static int ehrpwm_pwm_request(struct pwm_device *p)
{
struct ehrpwm_pwm *ehrpwm = to_ehrpwm_pwm(p);
int chan;
chan = p - &ehrpwm->pwm[0];
p->tick_hz = clk_get_rate(ehrpwm->clk);
debug("\n The clk freq is %lu", p->tick_hz);
clk_enable(ehrpwm->clk);
ehrpwm_pwm_stop(p);
return 0;
}
static int ehrpwm_pwm_config(struct pwm_device *p,
struct pwm_config *c)
{
int ret = 0;
switch (c->config_mask) {
case BIT(PWM_CONFIG_PERIOD_TICKS):
if (p->max_period_ticks &&
(p->max_period_ticks >= c->period_ticks))
p->period_ticks = p->max_period_ticks;
else
p->period_ticks = c->period_ticks;
ret = ehrpwm_pwm_set_prd(p);
break;
case BIT(PWM_CONFIG_DUTY_TICKS):
p->duty_ticks = c->duty_ticks;
ret = ehrpwm_pwm_set_dty(p);
break;
case BIT(PWM_CONFIG_POLARITY):
p->active_high = c->polarity;
ret = ehrpwm_pwm_set_pol(p);
break;
case BIT(PWM_CONFIG_START):
ret = ehrpwm_pwm_start(p);
break;
case BIT(PWM_CONFIG_STOP):
ret = ehrpwm_pwm_stop(p);
break;
default:
dev_dbg(p->dev, "%s: Invalid configuration\n", __func__);
ret = -EINVAL;
}
return ret;
}
