示例#1
0
static void emma2rh_gpio_irq_mask_ack(unsigned int irq)
{
	u32 reg;

	irq -= EMMA2RH_GPIO_IRQ_BASE;
	emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));

	reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
	reg &= ~(1 << irq);
	emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
示例#2
0
static void emma2rh_sw_irq_disable(unsigned int irq)
{
	u32 reg;

	irq -= EMMA2RH_SW_IRQ_BASE;

	reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
	reg &= ~(1 << irq);
	emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
}
示例#3
0
static void emma2rh_gpio_irq_enable(unsigned int irq)
{
	u32 reg;

	irq -= EMMA2RH_GPIO_IRQ_BASE;

	reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
	reg |= 1 << irq;
	emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
示例#4
0
void ll_emma2rh_sw_irq_disable(int irq)
{
	u32 reg;

	db_assert(irq >= 0);
	db_assert(irq < 32);

	reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
	reg &= ~(1 << irq);
	emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
}
示例#5
0
void ll_emma2rh_sw_irq_enable(int irq)
{
	u32 reg;

	db_assert(irq >= 0);
	db_assert(irq < NUM_EMMA2RH_IRQ_SW);

	reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
	reg |= 1 << irq;
	emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
}
示例#6
0
void ll_emma2rh_gpio_irq_disable(int irq)
{
	u32 reg;

	db_assert(irq >= 0);
	db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);

	reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
	reg &= ~(1 << irq);
	emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
示例#7
0
文件： irq.c 项目： 10x-Amin/nAa-kernel 
static void emma2rh_gpio_irq_end(unsigned int irq)
{
	u32 reg;

	if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {

		irq -= EMMA2RH_GPIO_IRQ_BASE;

		reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
		reg |= 1 << irq;
		emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
	}
}
示例#8
0
void ll_emma2rh_irq_disable(int emma2rh_irq)
{
	u32 reg_value;
	u32 reg_bitmask;
	u32 reg_index;

	reg_index = EMMA2RH_BHIF_INT_EN_0
	    + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
	    * (emma2rh_irq / 32);
	reg_value = emma2rh_in32(reg_index);
	reg_bitmask = 0x1 << (emma2rh_irq % 32);
	db_assert((reg_value & reg_bitmask) != 0);
	emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
}
示例#9
0
static void emma2rh_irq_disable(unsigned int irq)
{
	u32 reg_value;
	u32 reg_bitmask;
	u32 reg_index;

	irq -= EMMA2RH_IRQ_BASE;

	reg_index = EMMA2RH_BHIF_INT_EN_0 +
		    (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32);
	reg_value = emma2rh_in32(reg_index);
	reg_bitmask = 0x1 << (irq % 32);
	emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
}
示例#10
0
文件： led.c 项目： 274914765/C 
void markeins_led_clear(void)
{
    emma2rh_out32(LED_BASE, clear);
    emma2rh_out32(LED_BASE + 4, clear);
}
示例#11
0
void __init arch_init_irq(void)
{
	u32 reg;

	/* by default, interrupts are disabled. */
	emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0);
	emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0);
	emma2rh_out32(EMMA2RH_BHIF_INT_EN_2, 0);
	emma2rh_out32(EMMA2RH_BHIF_INT1_EN_0, 0);
	emma2rh_out32(EMMA2RH_BHIF_INT1_EN_1, 0);
	emma2rh_out32(EMMA2RH_BHIF_INT1_EN_2, 0);
	emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, 0);

	clear_c0_status(0xff00);
	set_c0_status(0x0400);

#define GPIO_PCI (0xf<<15)
	/* setup GPIO interrupt for PCI interface */
	/* direction input */
	reg = emma2rh_in32(EMMA2RH_GPIO_DIR);
	emma2rh_out32(EMMA2RH_GPIO_DIR, reg & ~GPIO_PCI);
	/* disable interrupt */
	reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
	emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg & ~GPIO_PCI);
	/* level triggerd */
	reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE);
	emma2rh_out32(EMMA2RH_GPIO_INT_MODE, reg | GPIO_PCI);
	reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A);
	emma2rh_out32(EMMA2RH_GPIO_INT_CND_A, reg & (~GPIO_PCI));
	/* interrupt clear */
	emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI);

	/* init all controllers */
	emma2rh_irq_init();
	emma2rh_sw_irq_init();
	emma2rh_gpio_irq_init();
	mips_cpu_irq_init();

	/* setup cascade interrupts */
	setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade);
	setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade);
	setup_irq(CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade);
}
示例#12
0
static void emma2rh_gpio_irq_ack(unsigned int irq)
{
	irq -= EMMA2RH_GPIO_IRQ_BASE;
	emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
}
示例#13
0
static void __init emma2rh_pci_init(void)
{
	/* setup PCI interface */
	emma2rh_out32(EMMA2RH_PCI_ARBIT_CTR, 0x70f);

	emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x80000a18);
	emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_COMMAND,
		      PCI_STATUS_DEVSEL_MEDIUM | PCI_STATUS_CAP_LIST |
		      PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
	emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_0, 0x10000000);
	emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_1, 0x00000000);

	emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x12000000 | 0x218);
	emma2rh_out32(EMMA2RH_PCI_IWIN1_CTR, 0x18000000 | 0x600);
	emma2rh_out32(EMMA2RH_PCI_INIT_ESWP, 0x00000200);

	emma2rh_out32(EMMA2RH_PCI_TWIN_CTR, 0x00009200);
	emma2rh_out32(EMMA2RH_PCI_TWIN_BADR, 0x00000000);
	emma2rh_out32(EMMA2RH_PCI_TWIN0_DADR, 0x00000000);
	emma2rh_out32(EMMA2RH_PCI_TWIN1_DADR, 0x00000000);
}
示例#14
0
static void emma2rh_gpio_irq_ack(unsigned int irq)
{
	irq -= emma2rh_gpio_irq_base;
	emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
	ll_emma2rh_gpio_irq_disable(irq);
}