static void _emxx_hc_stop(struct usb_hcd *hcd)
{
_ahb_pci_bridge_exit();
/* Reset State ON */
emxx_reset_device(EMXX_RST_USB0);
#ifdef CONFIG_MACH_EMGR
emxx_reset_device(EMXX_RST_USB1);
#endif
/* Stop Clock */
#ifdef CONFIG_MACH_EMEV
emxx_close_clockgate(EMXX_CLK_USB0 | EMXX_CLK_USB_PCI);
#elif defined(CONFIG_MACH_EMGR)
emxx_close_clockgate(EMXX_CLK_USB0 | EMXX_CLK_USB1 | EMXX_CLK_USB_PCI);
#endif
#ifdef CONFIG_MACH_EMGR
writel(0, SMU_USBPHY_HOST_FUNC_SEL);
writel(readl(SMU_OSC1CTRL1) | 0x1, SMU_OSC1CTRL1);
#endif
}
/*
* DeInit CFI module
*/
static void emxx_cfi_disable(void)
{
emxx_reset_device(EMXX_RST_CFI);
emxx_close_clockgate(EMXX_CLK_CFI | EMXX_CLK_CFI_H);
#ifdef CONFIG_MACH_EMEV
if ((system_rev & EMXX_REV_MASK) != EMXX_REV_ES1) {
#endif /* CONFIG_MACH_EMEV */
/* card power off */
pwc_reg_write(DA9052_LDO8_REG, 0x00);
mdelay(2);
#ifdef CONFIG_MACH_EMEV
}
#endif /* CONFIG_MACH_EMEV */
}
/*
* Init CFI module
*/
static void emxx_cfi_enable(void)
{
u32 val;
#ifdef CONFIG_MACH_EMEV
if ((system_rev & EMXX_REV_MASK) != EMXX_REV_ES1) {
#endif /* CONFIG_MACH_EMEV */
emxx_reset_device(EMXX_RST_CFI);
emxx_close_clockgate(EMXX_CLK_CFI | EMXX_CLK_CFI_H);
/* card power on */
pwc_reg_write(DA9052_LDO8_REG, 0x6A);
udelay(300);
#ifdef CONFIG_MACH_EMEV
}
#endif /* CONFIG_MACH_EMEV */
emxx_open_clockgate(EMXX_CLK_CFI | EMXX_CLK_CFI_H);
emxx_unreset_device(EMXX_RST_CFI);
/* config the CFI work in the PIO mode, hardware reset, 16 bit data */
writel(CFI_CONTROL_0_IDE, EMXX_CFI_CONTROL_0);
/* hardware reset release in CFI module */
val = readl(EMXX_CFI_CONTROL_0) | CFI_CONTROL_0_HRST;
writel(val, EMXX_CFI_CONTROL_0);
/* disable all the interrupts */
writel(0x00000000, EMXX_CFI_CONTROL_1);
/* clear all the interrupt */
writel(0xffffffff, EMXX_CFI_INTERRUPT);
/* PIO mode access timing confige */
writel(0x00001319, EMXX_CFI_TIMING_1);
/* setting for PIO */
val = readl(EMXX_CFI_BUSIF_CTRL) & 0xFFFFFF00;
writel(val | 0x00000062 | emxx_cfi_burst_mode, EMXX_CFI_BUSIF_CTRL);
}
