bool frudp_init()
{
enet_init();
FREERTPS_INFO("metal udp init()\r\n");
FREERTPS_INFO("using address %d.%d.%d.%d for unicast\r\n",
(FRUDP_IP4_ADDR >> 24) & 0xff,
(FRUDP_IP4_ADDR >> 16) & 0xff,
(FRUDP_IP4_ADDR >> 8) & 0xff,
(FRUDP_IP4_ADDR ) & 0xff);
g_frudp_config.unicast_addr = freertps_htonl(FRUDP_IP4_ADDR);
g_frudp_config.guid_prefix.prefix[0] = FREERTPS_VENDOR_ID >> 8;
g_frudp_config.guid_prefix.prefix[1] = FREERTPS_VENDOR_ID & 0xff;
memcpy(&g_frudp_config.guid_prefix.prefix[2], g_enet_mac, 6);
frudp_generic_init();
// not sure about endianness here.
// 4 bytes left. let's use the system time in microseconds since power-up
// todo: init ethernet PHY. after PHY link is up,
// store system time in the guid_prefix.
//memcpy(&g_frudp_config.guid_prefix.prefix[8], &pid, 4);
//frudp_disco_init();
return true;
}
int main(void) {
//***********************************************
// Inicializace
//***********************************************
Chip_IOCON_Init(LPC_IOCON);
Chip_GPIO_Init(LPC_GPIO);
enet_init();
eeprom_init();
setup_uarts();
//***********************************************
// Hlavni smycka
//***********************************************
while (1) {
eeprom_write();
ethernet_transmit();
}
return EXIT_FAILURE;
}
struct eth_driver*
ethif_plat_init(int dev_id, struct ethif_os_interface interface) {
struct enet * enet;
struct ocotp * ocotp;
struct clock* arm_clk;
struct imx6_eth_data *eth_data;
struct ldesc* ldesc;
(void)dev_id;
os_iface_init(interface);
eth_data = (struct imx6_eth_data*)os_malloc(sizeof(struct imx6_eth_data));
if (eth_data == NULL) {
cprintf(COL_IMP, "Failed to allocate dma buffers\n");
return NULL;
}
ldesc = ldesc_init(RX_DESC_COUNT, RXBUF_SIZE, TX_DESC_COUNT, TXBUF_SIZE);
assert(ldesc);
/*
* We scale up the CPU to improve benchmarking performance
* It is not the right place so should be moved later
*/
arm_clk = clk_get_clock(CLK_ARM);
clk_set_freq(arm_clk, CPU_FREQ);
CLK_DEBUG(printf("ARM clock frequency: %9d HZ\n", clk_get_freq(arm_clk)));
/* initialise the eFuse controller so we can get a MAC address */
ocotp = ocotp_init();
/* Initialise ethernet pins */
gpio_init();
setup_iomux_enet();
/* Initialise the phy library */
miiphy_init();
/* Initialise the phy */
phy_micrel_init();
/* Initialise the RGMII interface */
enet = enet_init(ldesc);
assert(enet);
/* Fetch and set the MAC address */
if(ocotp == NULL || ocotp_get_mac(ocotp, eth_data->ethaddr)){
memcpy(eth_data->ethaddr, DEFAULT_MAC, 6);
}
enet_set_mac(enet, eth_data->ethaddr);
/* Connect the phy to the ethernet controller */
if(fec_init(CONFIG_FEC_MXC_PHYMASK, enet)){
return NULL;
}
/* Start the controller */
enet_enable(enet);
/* Update book keeping */
eth_data->irq_enabled = 0;
eth_data->enet = enet;
eth_data->ldesc = ldesc;
eth_driver_set_data(&imx6_eth_driver, eth_data);
/* done */
return &imx6_eth_driver;
}
void main()
{
config_init();
console_init();
printf("bootloader main()\r\n");
const int MAX_CONFIG_ATTEMPTS = 3;
int attempt = 0;
for (; !fpga_is_init_complete() && attempt < MAX_CONFIG_ATTEMPTS; attempt++)
{
fpga_init();
flash_init(); // if needed, blow away fpga image with golden one.
}
if (attempt >= MAX_CONFIG_ATTEMPTS)
{
printf("fpga will not configure. now i will go into infinite loop...\r\n");
while (1) { } // aaahhhhhhhhhhhhhhhhhhhhh
}
enet_init();
printf("bootloader! hello, world!\r\n");
__enable_irq();
fpga_spi_txrx(0x80, 1); // turn off fpga led
// reset the PHY via hardware reset pin
//printf("asserting PHY hardware reset\r\n");
fpga_spi_txrx(FPGA_SPI_REG_MDIO_CFG | FPGA_SPI_WRITE, 4); // assert PHY_RESET
for (volatile int j = 0; j < 2000000; j++) { } // wait a while
fpga_spi_txrx(FPGA_SPI_REG_MDIO_CFG | FPGA_SPI_WRITE, 0); // release PHY_RESET
for (volatile int j = 0; j < 2000000; j++) { } // wait a longer while
//printf("requesting PHY software reset\r\n");
// now do a software reset of the PHY
fpga_spi_txrx(FPGA_SPI_REG_MDIO_WDATA | FPGA_SPI_WRITE,
0x9000); // set SW reset bit and auto-negotiate bit
fpga_spi_txrx(FPGA_SPI_REG_MDIO_CFG | FPGA_SPI_WRITE,
0x0001); // start write of register zero
for (volatile int j = 0; j < 2000000; j++) { } // wait a longer while
SysTick_Config(F_CPU/1000); // set up 1 khz systick
if ((*(uint32_t *)0x000088000) == 0)
{
printf("boot not possible; application vector table is undefined.\r\n");
boot_enabled = 0; // impossible to boot. don't time out.
}
printf("waiting until we have ARP to 10.10.1.1 ...\r\n");
// spin here until we have ARP, or until 20 seconds expire
uint32_t start_time = systick_count;
uint32_t dance_time = systick_count;
for (uint32_t loop_count = 0; !enet_arp_valid(); loop_count++)
{
enet_idle();
if (systick_count != dance_time && systick_count % 50 == 0)
{
dance_time = systick_count;
led_dance();
}
if (systick_count - start_time >= 15000)
break; // didn't hear back from ARP. sad. time to give up and move on.
}
printf("entering bootloader wait loop\r\n");
start_time = systick_count;
for (uint32_t loop_count = 0; ; loop_count++)
{
enet_idle();
if (systick_count != dance_time && systick_count % 100 == 0)
{
dance_time = systick_count;
led_dance();
}
if ((systick_count - start_time >= 5000 && boot_enabled) ||
boot_requested)
break; // hit timeout. boot.
}
printf("jumping to application. bye...\r\n");
typedef uint32_t (*app_fp)();
app_fp app = *((app_fp *)0x88004); // look up application start address
app(); // and call it
while (1) { } // shouldn't return, but if we do, hang out here.
}
