/*--- codigo de funciones ---*/ void Main(void) { /* Inicializa controladores */ exception_init(); sys_init(); // Inicializacion de la placa, interrupciones y puertos timer_init(); // Inicializacion del temporizador Eint4567_init(); // inicializamos los pulsadores. Cada vez que se pulse se verá reflejado en el 8led D8Led_init(); // inicializamos el 8led Timer2_Inicializar(); /* Configura el Timer2 */ Timer3_Inicializar(); /* Configura el Timer2 */ pila_Init(); Timer0_Empezar(); Timer2_Empezar(); juegoSudoku(); //push_debug(0xFFFFFFFF,Timer2_Leer()); while(1); }
void main(void) { timestamp_add_now(TS_START_ROMSTAGE); console_init(); exception_init(); configure_l2ctlr(); tsadc_init(); /* Need to power cycle SD card to ensure it is properly reset. */ sdmmc_power_off(); /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); timestamp_add_now(TS_BEFORE_INITRAM); sdram_init(get_sdram_config()); timestamp_add_now(TS_AFTER_INITRAM); /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, sdram_size_mb(), DCACHE_WRITEBACK); mmu_config_range((uintptr_t)_dma_coherent/MiB, _dma_coherent_size/MiB, DCACHE_OFF); cbmem_initialize_empty(); run_ramstage(); }
int main() { u32 depth = 16; //u32 depth = 24; // true color doesn't work? struct fb_info *fb; /* initialize early so we can use it for debugging */ serial_init(); mem_init(); fb = fb_init(depth); if (fb) { printk("hello world\n"); printk("resolution: %dx%d\n", fb->width, fb->height); } printk("firmware revision: 0x%x\n", get_firmware_revision()); printk("board model: 0x%x\n", get_board_model()); printk("board revision: 0x%x\n", get_board_revision()); exception_init(); init(); while (1) { int c; serial_printk("$ "); c = serial_getchar(); serial_printk("got this char: %c (%d) (0x%x)\n", c, c, c); } while(1) ; return 0; }
int main () { printf ("\n"); printf ("EIA-FR - Embedded Systems 2 Laboratory\n"); printf ("TP6: Low Level Interrupt Handling on i.MX27\n"); printf ("-------------------------------------------\n"); interrupt_init(); exception_init(); printf ("Test data abort with a miss aligned access\n"); uint32_t l = 0; uint32_t * pl = (uint32_t*)(char*) &l + 1; printf("%d", *pl); printf ("\nTest software interrupt\n"); __asm__("SWI #1;"); // generate SWI printf ("Test a invalid instruction\n"); __asm__(".word 0xffffffff;"); // undefined interrupt printf ("\nTest a prefetch abort\nThis method will never return...\n"); __asm__("mov pc, #0x0f000000;"); // prefetch abort interrupt while(1); return 0; }
static void mainboard_enable(device_t dev) { dev->ops->init = &mainboard_init; /* set up dcache and MMU */ /* FIXME: this should happen via resource allocator */ exynos5250_config_l2_cache(); mmu_init(); mmu_config_range(0, DRAM_START, DCACHE_OFF); mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK); mmu_config_range(DMA_START >> 20, DMA_SIZE >> 20, DCACHE_OFF); mmu_config_range(DRAM_END, 4096 - DRAM_END, DCACHE_OFF); dcache_invalidate_all(); dcache_mmu_enable(); /* this is going to move, but we must have it now and we're * not sure where */ exception_init(); const unsigned epll_hz = 192000000; const unsigned sample_rate = 48000; const unsigned lr_frame_size = 256; clock_epll_set_rate(epll_hz); clock_select_i2s_clk_source(); clock_set_i2s_clk_prescaler(epll_hz, sample_rate * lr_frame_size); power_enable_xclkout(); }
int main (int argc, char **argv) { mem_init(0); // do_abort jumps to here if (setjmp(abort_jmp) != 0) { dropline(); /* discard rest of input line if we longjmp'd here */ } stack_init(&data_stack, EXC_DS_UNDER, EXC_DS_OVER); // do_quit() jumps to here if (setjmp(quit_jmp) != 0) { dropline(); /* discard rest of input line if we longjmp'd here */ } stack_init(&return_stack, EXC_RS_UNDER, EXC_RS_OVER); stack_init(&control_stack, EXC_CS_UNDER, EXC_CS_OVER); exception_init(); interpreter_state = S_INTERPRET; docolon_mode = DM_NORMAL; // Run the interpreter while (1) { do_interpret(NULL); } exit(0); }
void main(void) { /* Globally disable MMU, caches, and branch prediction (these should * be disabled by default on reset) */ dcache_mmu_disable(); /* * Re-enable icache and branch prediction. MMU and dcache will be * set up later. * * Note: If booting from USB, we need to disable branch prediction * before copying from USB into RAM (FIXME: why?) */ if (boot_cpu()) { //bootblock_cpu_init(); //bootblock_mainboard_init(); } #if IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE) console_init(); exception_init(); #endif run_romstage(); }
int start_main(void) { extern int main(int argc, char **argv); /* Gather system information. */ lib_get_sysinfo(); /* Optionally set up the consoles. */ #if !IS_ENABLED(CONFIG_LP_SKIP_CONSOLE_INIT) console_init(); #endif exception_init(); /* * Any other system init that has to happen before the * user gets control goes here. */ /* * Go to the entry point. * In the future we may care about the return value. */ /* * Returning from main() will go to the _leave function to return * us to the original context. */ return main(main_argc, (main_argc != 0) ? main_argv : NULL); }
/* C code entry point for the boot block */ void bootblock_main(const uint64_t reg_x0, const uint64_t reg_pc) { uint64_t base_timestamp = 0; init_timer(); if (IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS)) base_timestamp = timestamp_get(); /* Initialize timestamps if we have TIMESTAMP region in memlayout.ld. */ if (IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS) && _timestamp_size > 0) timestamp_init(base_timestamp); bootblock_soc_early_init(); bootblock_mainboard_early_init(); if (IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) { console_init(); exception_init(); if (reg_x0) printk(BIOS_ERR, "BOOTBLOCK: RST Boot Failure Code %lld\n", reg_x0); } bootblock_soc_init(); bootblock_mainboard_init(); run_romstage(); }
void main(void) { extern struct mem_timings mem_timings; int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP); int power_init_failed; exynos5420_config_smp(); power_init_failed = setup_power(is_resume); timestamp_init(timestamp_get()); timestamp_add_now(TS_START_ROMSTAGE); /* Clock must be initialized before console_init, otherwise you may need * to re-initialize serial console drivers again. */ system_clock_init(); exynos_pinmux_uart3(); console_init(); exception_init(); if (power_init_failed) die("Failed to intialize power.\n"); /* re-initialize PMIC I2C channel after (re-)setting system clocks */ i2c_init(PMIC_I2C_BUS, 1000000, 0x00); /* 1MHz */ timestamp_add_now(TS_BEFORE_INITRAM); setup_memory(&mem_timings, is_resume); timestamp_add_now(TS_AFTER_INITRAM); primitive_mem_test(); trustzone_init(); if (is_resume) { wakeup(); } setup_gpio(); setup_ec(); simple_spi_test(); /* Set SPI (primary CBFS media) clock to 50MHz. */ /* if this is uncommented SPI will not work correctly. */ clock_set_rate(PERIPH_ID_SPI1, 50000000); exynos_pinmux_spi1(); simple_spi_test(); cbmem_initialize_empty(); simple_spi_test(); timestamp_add_now(TS_END_ROMSTAGE); run_ramstage(); }
void main(void) { void *entry; console_init(); exception_init(); run_romstage(); }
void arch_early_init(void) { arm_mmu_init(); kmalloc_init(&__heap, HEAP_SIZE); arm_mmu_remap_evt(); exception_init(); //clean_user_space(); show_arch_info(); }
/* * Initialization code. * * Called from kernel_start() routine that is * implemented in HAL. * We assume that the following machine state has * been already set before this routine. * - Kernel BSS section is filled with 0. * - Kernel stack is configured. * - All interrupts are disabled. * - Minimum page table is set. (MMU systems only) */ int main(void) { sched_lock(); diag_init(); DPRINTF((BANNER)); /* * Initialize memory managers. */ page_init(); kmem_init(); /* * Do machine-dependent * initialization. */ machine_startup(); /* * Initialize kernel core. */ vm_init(); task_init(); thread_init(); sched_init(); exception_init(); timer_init(); object_init(); msg_init(); /* * Enable interrupt and * initialize devices. */ irq_init(); clock_init(); device_init(); /* * Set up boot tasks. */ task_bootstrap(); /* * Start scheduler and * enter idle loop. */ sched_unlock(); thread_idle(); /* NOTREACHED */ return 0; }
void main(void) { void *entry; console_init(); exception_init(); entry = vboot2_verify_firmware(); if (entry != (void *)-1) stage_exit(entry); hlt(); }
static void __attribute__((noinline)) romstage(void) { timestamp_init(0); timestamp_add_now(TS_START_ROMSTAGE); console_init(); exception_init(); sdram_init(get_sdram_config()); /* used for MMU and CBMEM setup, in MB */ u32 dram_start_mb = (uintptr_t)_dram/MiB; u32 dram_end_mb = sdram_max_addressable_mb(); u32 dram_size_mb = dram_end_mb - dram_start_mb; configure_l2_cache(); mmu_init(); /* Device memory below DRAM is uncached. */ mmu_config_range(0, dram_start_mb, DCACHE_OFF); /* SRAM is cached. MMU code will round size up to page size. */ mmu_config_range((uintptr_t)_sram/MiB, div_round_up(_sram_size, MiB), DCACHE_WRITEBACK); /* DRAM is cached. */ mmu_config_range(dram_start_mb, dram_size_mb, DCACHE_WRITEBACK); /* A window for DMA is uncached. */ mmu_config_range((uintptr_t)_dma_coherent/MiB, _dma_coherent_size/MiB, DCACHE_OFF); /* The space above DRAM is uncached. */ if (dram_end_mb < 4096) mmu_config_range(dram_end_mb, 4096 - dram_end_mb, DCACHE_OFF); mmu_disable_range(0, 1); dcache_mmu_enable(); /* * A watchdog reset only resets part of the system so it ends up in * a funny state. If that happens, we need to reset the whole machine. */ if (power_reset_status() == POWER_RESET_WATCHDOG) { printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n"); hard_reset(); } /* FIXME: this may require coordination with moving timestamps */ cbmem_initialize_empty(); early_mainboard_init(); run_ramstage(); }
void romstage(void) { timestamp_add_now(TS_START_ROMSTAGE); console_init(); exception_init(); printk(BIOS_INFO, "T132: romstage here\n"); #if CONFIG_BOOTROM_SDRAM_INIT printk(BIOS_INFO, "T132 romstage: SDRAM init done by BootROM, RAMCODE = %d\n", sdram_get_ram_code()); #else sdram_init(get_sdram_config()); printk(BIOS_INFO, "T132 romstage: sdram_init done\n"); #endif timestamp_add_now(TS_AFTER_INITRAM); /* * Trust Zone needs to be initialized after the DRAM initialization * because carveout registers are programmed during DRAM init. * cbmem_initialize() is dependent on the Trust Zone region * initalization because CBMEM lives right below the Trust Zone which * needs to be properly identified. */ trustzone_region_init(); /* * When romstage is running it's always on the reboot path -- never a * resume path where cbmem recovery is required. Therefore, always * initialize the cbmem area to be empty. */ cbmem_initialize_empty(); ccplex_cpu_prepare(); printk(BIOS_INFO, "T132 romstage: cpu prepare done\n"); ccplex_load_mts(); printk(BIOS_INFO, "T132 romstage: MTS loading done\n"); romstage_mainboard_init(); run_ramstage(); }
void main(void) { console_init(); tsadc_init(TSHUT_POL_HIGH); exception_init(); /* Init DVS to conservative values. */ init_dvs_outputs(); prepare_usb(); sdram_init(get_sdram_config()); mmu_config_range((void *)0, (uintptr_t)dram_size, CACHED_MEM); mmu_config_range(_dma_coherent, _dma_coherent_size, UNCACHED_MEM); cbmem_initialize_empty(); run_ramstage(); }
void *thead_main(void *data) { int re; Exception e; exception_init(&e); re = sigsetjmp(e.jmpbuf, 0); if (re == 0) { do_panic(data); } else { printf("exception_recover: %p\n", data); } exception_destroy(&e); return NULL; }
void main(void) { const char *stage_name = "fallback/romstage"; void *entry; bootblock_cpu_init(); bootblock_mainboard_init(); if (CONFIG_BOOTBLOCK_CONSOLE) { console_init(); exception_init(); } entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name); if (entry) stage_exit(entry); hlt(); }
void main(void) { init_timer(); if (IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION)) timestamp_init(timestamp_get()); bootblock_mainboard_early_init(); #if CONFIG_BOOTBLOCK_CONSOLE console_init(); exception_init(); #endif bootblock_soc_init(); bootblock_mainboard_init(); run_romstage(); }
void main(void) { struct mem_timings *mem; int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP); timestamp_init(timestamp_get()); timestamp_add_now(TS_START_ROMSTAGE); /* Clock must be initialized before console_init, otherwise you may need * to re-initialize serial console drivers again. */ mem = setup_clock(); console_init(); exception_init(); setup_power(is_resume); timestamp_add_now(TS_BEFORE_INITRAM); setup_memory(mem, is_resume); timestamp_add_now(TS_AFTER_INITRAM); /* This needs to happen on normal boots and on resume. */ trustzone_init(); if (is_resume) { wakeup(); } setup_gpio(); setup_graphics(); /* Set SPI (primary CBFS media) clock to 50MHz and configure pinmux. */ exynos_pinmux_spi1(); clock_set_rate(PERIPH_ID_SPI1, 50000000); cbmem_initialize_empty(); timestamp_add_now(TS_END_ROMSTAGE); run_ramstage(); }
void main(void) { // enable pinmux clamp inputs clamp_tristate_inputs(); // enable JTAG at the earliest stage enable_jtag(); clock_early_uart(); // Serial out, tristate off. pinmux_set_config(PINMUX_KB_ROW9_INDEX, PINMUX_KB_ROW9_FUNC_UA3); // Serial in, tristate_on. pinmux_set_config(PINMUX_KB_ROW10_INDEX, PINMUX_KB_ROW10_FUNC_UA3 | PINMUX_PULL_UP | PINMUX_INPUT_ENABLE); // Mux some pins away from uart A. pinmux_set_config(PINMUX_UART2_CTS_N_INDEX, PINMUX_UART2_CTS_N_FUNC_UB3 | PINMUX_INPUT_ENABLE); pinmux_set_config(PINMUX_UART2_RTS_N_INDEX, PINMUX_UART2_RTS_N_FUNC_UB3); if (CONFIG_BOOTBLOCK_CONSOLE) { console_init(); exception_init(); } clock_init(); bootblock_mainboard_init(); pinmux_set_config(PINMUX_CORE_PWR_REQ_INDEX, PINMUX_CORE_PWR_REQ_FUNC_PWRON); pinmux_set_config(PINMUX_CPU_PWR_REQ_INDEX, PINMUX_CPU_PWR_REQ_FUNC_CPU); pinmux_set_config(PINMUX_PWR_INT_N_INDEX, PINMUX_PWR_INT_N_FUNC_PMICINTR | PINMUX_INPUT_ENABLE); run_romstage(); }
asmlinkage void bootblock_main_with_timestamp(uint64_t base_timestamp) { /* Initialize timestamps if we have TIMESTAMP region in memlayout.ld. */ if (IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS) && _timestamp_size > 0) timestamp_init(base_timestamp); cmos_post_init(); bootblock_soc_early_init(); bootblock_mainboard_early_init(); if (IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) { console_init(); exception_init(); } bootblock_soc_init(); bootblock_mainboard_init(); run_romstage(); }
void main(void) { // enable JTAG at the earliest stage enable_jtag(); clock_early_uart(); /* Configure mselect clock. */ clock_configure_source(mselect, PLLP, 102000); /* Enable AVP cache, timer, APB dma, and mselect blocks. */ clock_enable_clear_reset(CLK_L_CACHE2 | CLK_L_TMR, CLK_H_APBDMA, 0, CLK_V_MSELECT, 0, 0); /* Find ODMDATA in IRAM and save it to scratch reg */ save_odmdata(); bootblock_mainboard_early_init(); if (CONFIG_BOOTBLOCK_CONSOLE) { console_init(); exception_init(); printk(BIOS_INFO, "T132: Bootblock here\n"); } clock_init(); printk(BIOS_INFO, "T132 bootblock: Clock init done\n"); pmc_print_rst_status(); bootblock_mainboard_init(); printk(BIOS_INFO, "T132 bootblock: Mainboard bootblock init done\n"); run_romstage(); }
int main(void) { int vmode = -1; exception_init(); dsp_reset(); irq_initialize(); irq_bw_enable(BW_PI_IRQ_RESET); irq_bw_enable(BW_PI_IRQ_HW); //hollywood pic /* external ohci */ irq_hw_enable(IRQ_OHCI0); /* internal ohci */ //irq_hw_enable(IRQ_OHCI1); ipc_initialize(); ipc_slowping(); gecko_init(); input_init(); init_fb(vmode); VIDEO_Init(vmode); VIDEO_SetFrameBuffer(get_xfb()); VISetupEncoder(); u32 version = ipc_getvers(); u16 mini_version_major = version >> 16 & 0xFFFF; u16 mini_version_minor = version & 0xFFFF; printf("Mini version: %d.%0d\n", mini_version_major, mini_version_minor); if (version < MINIMUM_MINI_VERSION) { printf("Sorry, this version of MINI (armboot.bin)\n" "is too old, please update to at least %d.%0d.\n", (MINIMUM_MINI_VERSION >> 16), (MINIMUM_MINI_VERSION & 0xFFFF)); for (;;) ; // better ideas welcome! }
int shell (int argc, char* args[]) { FILE* file = NULL; table = (void**)(vm_exec(NULL, NULL).ptr); gc_init(); new_func_data_table(); new_global_environment(); exception_init(); if (argc > 1){ file = fopen(args[1],"r"); if (!file) { EXCEPTION("Script not found!!\n"); exit(1); } } init_first(); set_static_mtds(); void *handler = dlopen("libreadline" K_OSDLLEXT, RTLD_LAZY); void *f = (handler != NULL) ? dlsym(handler, "readline") : NULL; myreadline = (f != NULL) ? (char* (*)(const char*))f : NULL; f = (handler != NULL) ? dlsym(handler, "add_history") : NULL; myadd_history = (f != NULL) ? (int (*)(const char*))f : _add_history; int i = 0; while (bootstrap_functions[i] != NULL) { split_and_exec(2, args, (char*)bootstrap_functions[i]); i++; } if (argc > 1){ shell_file(argc, args, file); } else { shell_readline(argc, args); } func_data_table_free(); opline_free(); gc_end(); return 0; }
void start_main(void) { extern int main(int argc, char **argv); pre_sysinfo_scan_mmu_setup(); /* Gather system information. */ lib_get_sysinfo(); post_sysinfo_scan_mmu_setup(); #if !IS_ENABLED(CONFIG_LP_SKIP_CONSOLE_INIT) console_init(); #endif printf("ARM64: Libpayload %s\n",__func__); exception_init(); test_exception(); /* * Any other system init that has to happen before the * user gets control goes here. */ /* * Go to the entry point. * In the future we may care about the return value. */ (void) main(main_argc, (main_argc != 0) ? main_argv : NULL); /* * Returning here will go to the _leave function to return * us to the original context. */ }
void main(void) { console_init(); printk(BIOS_INFO, "hello from ramstage; now with deluxe exception handling.\n"); /* this is going to move, but we must have it now and we're not sure where */ exception_init(); /* place at top of physical memory */ high_tables_size = CONFIG_COREBOOT_TABLES_SIZE; high_tables_base = CONFIG_SYS_SDRAM_BASE + ((CONFIG_DRAM_SIZE_MB << 20UL) * CONFIG_NR_DRAM_BANKS) - CONFIG_COREBOOT_TABLES_SIZE; const unsigned epll_hz = 192000000; const unsigned sample_rate = 48000; const unsigned lr_frame_size = 256; clock_epll_set_rate(epll_hz); clock_select_i2s_clk_source(); clock_set_i2s_clk_prescaler(epll_hz, sample_rate * lr_frame_size); power_enable_xclkout(); hardwaremain(0); }
int main(void) { // slot LED write32(0xcd8000c0, 0x20); dsp_reset(); exception_init(); // Install trampoline at 80001800; some payloads like to jump // there to restart. Sometimes this can even work. //memcpy(trampoline_buffer, reboot_trampoline, sizeof(reboot_trampoline)); // Clear interrupt mask. write32(0x0c003004, 0); // Unlock EXI. write32(0x0d00643c, 0); video_init(); usbgecko_init(); printf("savezelda\n%s\n", version); printf("\n"); printf("Copyright 2008,2009 Segher Boessenkool\n"); printf("Copyright 2008 Haxx Enterprises\n"); printf("Copyright 2008 Hector Martin (\"marcan\")\n"); printf("Copyright 2003,2004 Felix Domke\n"); printf("\n"); printf("This code is licensed to you under the terms of the\n"); printf("GNU GPL, version 2; see the file COPYING\n"); printf("\n"); printf("Font and graphics by Freddy Leitner\n"); printf("\n"); printf("\n"); printf("Cleaning up environment... "); reset_ios(); printf("OK.\n"); int err; restart: err = try_sd_load(); if (err) { err = try_usbgecko_load(); if (err) { printf("No code found to load, hanging.\n"); for (;;) ; } } if (valid_elf_image(code_buffer)) { printf("Valid ELF image detected.\n"); void (*entry)() = load_elf_image(code_buffer); entry(); printf("Program returned to loader, reloading.\n"); } else printf("No valid ELF image detected, retrying.\n"); goto restart; }
main() { mach_port_t bootstrap_port; int i; struct test_dir *td, **tds; int all; kern_return_t kr; boolean_t found; int argc = 0; char **argv; MACH_CALL(task_get_special_port, (mach_task_self(), TASK_BOOTSTRAP_PORT, &bootstrap_port)); MACH_CALL(bootstrap_ports, (bootstrap_port, &privileged_host_port, &master_device_port, &root_ledger_wired, &root_ledger_paged, &security_port)); MACH_FUNC(host_port, mach_host_self, ()); standalone = is_standalone(); threads_init(); console_init(); _printf_init(); exception_init(); printf("\n\n"); version(); kernel_version(); if (standalone) printf("Standalone mode\n\n"); vm_opt = 1; print_vm_stats(); printf("\n"); get_thread_sched_attr(mach_thread_self(), (policy_state_t) 0, TRUE); printf("\n"); while(1) { mach_setjmp(&sa_jmp_buf); reset_options(); /* synthetic benchmarks are not the default type */ synthetic_fn = NULL; reset_more(); if (!(argc = read_cmd(&argv, "mpts> "))) continue; for (i = 1; i < argc; i++) is_gen_opt(argc, argv, &i, 0, 0); if (!strcmp(argv[0],"on")) { shift_args(&argc, argv); if (remote_node(argc, argv)) { shift_args(&argc, argv); } else { interruptible_cmd(usage, 0, 0); continue; } } if (!strcmp(argv[0],"more")) { shift_args(&argc, argv); } else disable_more(); all = strcmp(argv[0],"*") ? 0 : 1; for (found = FALSE, tds = test_dirs; *tds && !found; tds++) for (td = *tds; td->name && !found; td++) if ((all && td->is_a_test) || !strcmp(argv[0],td->name)) { if (td->is_a_test) printf("_______________________________________________________________________________\n"); argv[0] = td->name; if (td->is_a_test) interruptible_cmd(td->func, argc, argv); else (*td->func) (argc, argv); if (!all) found = TRUE; } if ((!all) && (!found)) { if (find_proc(argv[0])) /* run synthetic benchmark if we have a proc name */ interruptible_cmd(synthetic,argc,argv); else interruptible_cmd(usage, 0, 0); } } printf("done\n"); }