int
main(int argc, char *argv[])
{
GEF_STATUS status;
int fpga_choice, firmware_choice=0;
char *mcs_filename;
int inputchar=10;
int ifa=0;
unsigned int cfw=0;
printf("\nJLAB fadc firmware update\n");
printf("----------------------------\n");
progName = argv[0];
if(argc<3)
{
printf(" ERROR: Must specify two arguments\n");
Usage();
exit(-1);
}
else
{
fpga_choice = atoi(argv[1]);
mcs_filename = argv[2];
}
if( (fpga_choice != 1) &&
(fpga_choice != 2) )
{
printf(" ERROR: Invalid FPGA choice (%d)\n",fpga_choice);
Usage();
exit(-1);
}
if(fadcFirmwareReadMcsFile(mcs_filename) != OK)
{
exit(-1);
}
status = vmeOpenDefaultWindows();
fadcA32Base=0x09000000;
int iFlag = (DIST_ADDR)<<10;
/* Sync Source */
iFlag |= (1<<0); /* P2 */
/* Trigger Source */
iFlag |= (1<<2); // VXS Input Trigger
/* Clock Source */
iFlag |= (0<<5); // Internal Clock Source
iFlag |= (1<<18); // Skip firmware check
/* iFlag |= (1<<16); // Skip initialization */
#ifdef SKIPSS
faInit((unsigned int)(FADC_ADDR),(1<<19),NFADC+2,iFlag);
#else
faInit((unsigned int)(FADC_ADDR),(1<<19),NFADC,iFlag);
#endif
if(nfadc==0)
{
printf(" Unable to initialize any FADCs.\n");
goto CLOSE;
}
for(ifa=0; ifa<nfadc; ifa++)
{
cfw = faGetFirmwareVersions(faSlot(ifa),0);
printf("%2d: Control Firmware Version: 0x%04x Proc Firmware Version: 0x%04x\n",
faSlot(ifa),cfw&0xFFFF,(cfw>>16)&0xFFFF);
}
printf(" Will update firmware for ");
if(fpga_choice==1)
{
firmware_choice = FADC_FIRMWARE_FX70T;
printf("FX70T (Control FPGA) ");
}
else if(fpga_choice==2)
{
firmware_choice = FADC_FIRMWARE_LX110;
printf("LX110 (Processing FPGA) ");
}
printf(" with file: \n %s\n",mcs_filename);
printf(" <ENTER> to continue... or q and <ENTER> to quit without update\n");
inputchar = getchar();
if((inputchar == 113) ||
(inputchar == 81))
{
printf(" Exiting without update\n");
goto CLOSE;
}
fadcFirmwareGLoad(firmware_choice,0);
goto CLOSE;
CLOSE:
status = vmeCloseDefaultWindows();
if (status != GEF_SUCCESS)
{
printf("vmeCloseDefaultWindows failed: code 0x%08x\n",status);
return -1;
}
exit(0);
}
int
main(int argc, char *argv[])
{
GEF_STATUS status;
char *filename;
int inputchar=10;
int ch, ifa=0;
unsigned int cfw=0;
FILE *f;
fa250Ped ped;
printf("\nJLAB fadc pedestal measurement\n");
printf("----------------------------\n");
progName = argv[0];
if(argc != 2)
{
printf(" ERROR: Must specify one arguments\n");
Usage();
exit(-1);
}
else
filename = argv[1];
status = vmeOpenDefaultWindows();
fadcA32Base=0x09000000;
int iFlag = (DIST_ADDR)<<10;
/* Sync Source */
iFlag |= (1<<0); /* P2 */
/* Trigger Source */
iFlag |= (1<<2); // VXS Input Trigger
/* Clock Source */
iFlag |= (0<<5); // Internal Clock Source
iFlag |= (1<<18); // Skip firmware check
/* iFlag |= (1<<16); // Skip initialization */
#ifdef SKIPSS
faInit((unsigned int)(FADC_ADDR),(1<<19),NFADC+2,iFlag);
#else
faInit((unsigned int)(FADC_ADDR),(1<<19),NFADC,iFlag);
#endif
fadc250Config("");
if(nfadc==0)
{
printf(" Unable to initialize any FADCs.\n");
goto CLOSE;
}
f = fopen(filename, "wt");
#ifdef NEWFORMAT
for(ifa=0; ifa<nfadc; ifa++)
{
if(f) fprintf(f, "FADC250_SLOT %d\nFADC250_ALLCH_PED", faSlot(ifa));
for(ch=0; ch<16; ch++)
{
if(faMeasureChannelPedestal(faSlot(ifa), ch, &ped) != OK)
{
printf(" Unabled to measure pedestal on slot %d, ch %d...\n", faSlot(ifa), ch);
fclose(f);
goto CLOSE;
}
if(f) fprintf(f, " %8.3f", ped.avg);
}
if(f) fprintf(f, "\n");
}
#else
for(ifa=0; ifa<nfadc; ifa++)
{
for(ch=0; ch<16; ch++)
{
if(faMeasureChannelPedestal(faSlot(ifa), ch, &ped) != OK)
{
printf(" Unabled to measure pedestal on slot %d, ch %d...\n", faSlot(ifa), ch);
fclose(f);
goto CLOSE;
}
if(f) fprintf(f, "%3d %3d %8.3f %8.3f\n", faSlot(ifa),ch,ped.avg,ped.rms);
}
}
#endif
if(f)
fclose(f);
else
printf(" Unable to open pedestal file %s\n", filename);
CLOSE:
status = vmeCloseDefaultWindows();
if (status != GEF_SUCCESS)
{
printf("vmeCloseDefaultWindows failed: code 0x%08x\n",status);
return -1;
}
exit(0);
}
int
main(int argc, char *argv[])
{
int stat;
printf("\nJLAB fADC250-V2 Tests\n");
printf("----------------------------\n");
/* remexSetCmsgServer("dafarm28"); */
/* remexInit(NULL,1); */
vmeOpenDefaultWindows();
/* Setup Address and data modes for DMA transfers
*
* vmeDmaConfig(addrType, dataType, sstMode);
*
* addrType = 0 (A16) 1 (A24) 2 (A32)
* dataType = 0 (D16) 1 (D32) 2 (BLK32) 3 (MBLK) 4 (2eVME) 5 (2eSST)
* sstMode = 0 (SST160) 1 (SST267) 2 (SST320)
*/
vmeDmaConfig(2,5,1);
/* INIT dmaPList */
dmaPFreeAll();
vmeIN = dmaPCreate("vmeIN",MAX_EVENT_LENGTH,MAX_EVENT_POOL,0);
vmeOUT = dmaPCreate("vmeOUT",0,0,0);
dmaPStatsAll();
dmaPReInitAll();
/* gefVmeSetDebugFlags(vmeHdl,0x0); */
vmeSetQuietFlag(1); /* skip the errors associated with BUS Errors */
/* Setup FlexIO */
flexioInit(0xee0, FLEXIO_MODE_POLL);
flexioWriteCsr(0, 0x8000); // reset
flexioWriteCsr(0, 0x1); // output in vme pulse mode
/* Setup output data pattern */
flexioWriteData(0, 0xeded);
/* flexioWriteData(0, 0xeded); */
/* Setup fADC250 */
NFADC = 16+2; /* 16 slots + 2 (for the switch slots) */
fadcA32Base=0x09000000;
/* Setup the iFlag.. flags for FADC initialization */
int iFlag=0;
/* Sync Source */
iFlag |= (0<<0); /* VME */
/* Trigger Source */
iFlag |= (4<<1); /* Internal */
/* Clock Source */
iFlag |= FA_INIT_INT_CLKSRC; /* Self */
iFlag |= FA_INIT_SKIP_FIRMWARE_CHECK;
/* faInit((unsigned int)(3<<19),(1<<19),NFADC,iFlag); */
faInit(0xed0000,0,1,iFlag);
NFADC=nfadc; /* Redefine our NFADC with what was found from the driver */
vmeSetQuietFlag(0); /* Turn the error statements back on */
faItrigDisable(0, 1);
MAXFADCWORDS = NFADC * BLOCKLEVEL * (1+2+FADC_WINDOW_WIDTH*16) + 3;
printf("**************************************************\n");
printf("* Calculated MAX FADC words per block = %d\n",MAXFADCWORDS);
printf("**************************************************\n");
if(NFADC>1)
faEnableMultiBlock(1);
if(NFADC==0)
goto CLOSE;
/* Additional Configuration for each module */
fadcSlotMask=0;
int islot=0;
for(islot=0;islot<NFADC;islot++)
{
FA_SLOT = fadcID[islot]; /* Grab the current module's slot number */
fadcSlotMask |= (1<<FA_SLOT); /* Add it to the mask */
/* faDataInsertAdcParameters(FA_SLOT,1); */
/* faDataSuppressTriggerTime(FA_SLOT,2); */
/* Set the internal DAC level */
faSetDAC(FA_SLOT,FADC_DAC_LEVEL,0);
/* Set the threshold for data readout */
faSetThreshold(FA_SLOT,FADC_THRESHOLD,0);
/* Setup option 1 processing - RAW Window Data <-- */
/* option 2 - RAW Pulse Data */
/* option 3 - Integral Pulse Data */
/* Setup 200 nsec latency (PL = 50) */
/* Setup 80 nsec Window (PTW = 20) */
/* Setup Pulse widths of 36ns (NSB(3)+NSA(6) = 9) */
/* Setup up to 1 pulse processed */
/* Setup for both ADC banks(0 - all channels 0-15) */
/* Integral Pulse Data */
faSetProcMode(FA_SLOT,faMode,FADC_WINDOW_LAT,FADC_WINDOW_WIDTH,3,6,3,0);
/* Bus errors to terminate block transfers (preferred) */
faEnableBusError(FA_SLOT);
/* Set the Block level */
faSetBlockLevel(FA_SLOT,BLOCKLEVEL);
/* Set the individual channel pedestals for the data that is sent
* to the CTP
*/
int ichan;
for(ichan=0; ichan<16; ichan++)
{
faSetChannelPedestal(FA_SLOT,ichan,0);
}
faSetTriggerPathThreshold(FA_SLOT, 500);
}
/************************************************************
*
* Setup Internal Triggering
*
* Four Modes of Operation (tmode)
* 0) Table Mode
* 1) Coincidence Mode
* 2) Window Mode
* 3) INVALID
* 4) Sum Mode
*
* wMask = Mask of 16 channels to be enabled for Window Mode
* wWidth = Width of trigger window before latching (in clocks)
* cMask = Mask of 16 channels to be enabled for Coincidence Mode
* sumThresh = 10-12 bit threshold for Sum trigger to be latched
* tTable = pointer to trigger table (65536 values) to be loaded
*/
int tmode=0;
unsigned int wWidth=5, wMask=0x0, cMask=0xeded, sumThresh=0, tTable[65536];
memset((char *)tTable,0,65536*sizeof(unsigned int));
tTable[0xeded] = 1;
faItrigSetMode(FA_SLOT, tmode, wWidth, wMask,
cMask, sumThresh, (uint32_t *)tTable);
faItrigSetHBwidth(0, 2, 0xffff);
faGStatus(0);
/* FADC Perform some resets, status */
for(islot=0;islot<NFADC;islot++)
{
FA_SLOT = fadcID[islot];
/* faSetClockSource(FA_SLOT,2); */
faClear(FA_SLOT);
faResetToken(FA_SLOT);
faResetTriggerCount(FA_SLOT);
}
faGStatus(0);
faItrigStatus(0,0);
faItrigPrintHBinfo(0);
/* Enable FADC */
for(islot=0;islot<NFADC;islot++)
{
FA_SLOT = fadcID[islot];
faEnableSyncSrc(FA_SLOT);
}
faSync(0);
taskDelay(1);
/* faGStatus(0); */
int pti_status;
void *res;
pti_status =
pthread_create(&fapollthread,
NULL,
(void*(*)(void *)) faPoll,
(void *)NULL);
if(pti_status!=0)
{
printf("%s: ERROR: FA Polling Thread could not be started.\n",
__FUNCTION__);
printf("\t pthread_create returned: %d\n",pti_status);
}
printf("Hit enter to start triggers\n");
getchar();
faGEnable(1,0);
faItrigEnable(0, 1);
faItrigStatus(0,0);
faStopped=0;
flexioWriteCsr(0, 0x101); // send first pulse
printf("Hit any key to Disable TID and exit.\n");
getchar();
vmeBusLock();
/* FADC Disable */
faGDisable(1);
faStopped=1;
vmeBusUnlock();
if(fapollthread)
{
if(pthread_cancel(fapollthread)<0)
perror("pthread_cancel");
if(pthread_join(fapollthread,&res)<0)
perror("pthread_join");
if (res == PTHREAD_CANCELED)
printf("%s: Polling thread canceled\n",__FUNCTION__);
else
printf("%s: ERROR: Polling thread NOT canceled\n",__FUNCTION__);
}
faGStatus(0);
faPrintAuxScal(0);
CLOSE:
dmaPFreeAll();
vmeCloseDefaultWindows();
exit(0);
}
