/* Function to add the subsequent RAM partition info to the device tree. */
int dev_tree_add_mem_info(void *fdt, uint32_t offset, uint32_t addr, uint32_t size)
{
static int mem_info_cnt = 0;
int ret;
if (!mem_info_cnt)
{
/* Replace any other reg prop in the memory node. */
ret = fdt_setprop_u32(fdt, offset, "reg", addr);
mem_info_cnt = 1;
}
else
{
/* Append the mem info to the reg prop for subsequent nodes. */
ret = fdt_appendprop_u32(fdt, offset, "reg", addr);
}
if (ret)
{
dprintf(CRITICAL, "Failed to add the memory information addr: %d\n",
ret);
}
ret = fdt_appendprop_u32(fdt, offset, "reg", size);
if (ret)
{
dprintf(CRITICAL, "Failed to add the memory information size: %d\n",
ret);
}
return ret;
}
/*
* This function updates the mmu-masters property on the SMMU
* node as per the SMMU binding-- phandle and list of stream IDs
* for each MMU master.
*/
void append_mmu_masters(void *blob, const char *smmu_path,
const char *master_name, u32 *stream_ids, int count)
{
u32 phandle;
int smmu_nodeoffset;
int master_nodeoffset;
int i;
/* get phandle of mmu master device */
master_nodeoffset = fdt_path_offset(blob, master_name);
if (master_nodeoffset < 0) {
printf("\n%s: ERROR: master not found\n", __func__);
return;
}
phandle = fdt_get_phandle(blob, master_nodeoffset);
if (!phandle) { /* if master has no phandle, create one */
phandle = fdt_create_phandle(blob, master_nodeoffset);
if (!phandle) {
printf("\n%s: ERROR: unable to create phandle\n",
__func__);
return;
}
}
/* append it to mmu-masters */
smmu_nodeoffset = fdt_path_offset(blob, smmu_path);
if (fdt_appendprop_u32(blob, smmu_nodeoffset, "mmu-masters",
phandle) < 0) {
printf("\n%s: ERROR: unable to update SMMU node\n", __func__);
return;
}
/* for each stream ID, append to mmu-masters */
for (i = 0; i < count; i++) {
fdt_appendprop_u32(blob, smmu_nodeoffset, "mmu-masters",
stream_ids[i]);
}
/* fix up #stream-id-cells with stream ID count */
if (fdt_setprop_u32(blob, master_nodeoffset, "#stream-id-cells",
count) < 0)
printf("\n%s: ERROR: unable to update #stream-id-cells\n",
__func__);
}
static int fdtloader_add_single_meminfo(meminfo_pdata_t *pdata, boot_uint64_t addr, boot_uint64_t size)
{
int rc = 0;
// set first addr
if (!pdata->do_append) {
if (pdata->addr_cell_size == 2) {
rc = fdt_setprop_u32(pdata->fdt, pdata->memoffset, "reg", addr >> 32);
if (rc) return -1;
rc = fdt_appendprop_u32(pdata->fdt, pdata->memoffset, "reg", (boot_uint32_t)addr);
if (rc) return -1;
} else {
/* Function to add the first RAM partition info to the device tree.
* Note: The function replaces the reg property in the "/memory" node
* with the addr and size provided.
*/
int dev_tree_add_first_mem_info(uint32_t *fdt, uint32_t offset, uint32_t addr, uint32_t size)
{
int ret;
ret = fdt_setprop_u32(fdt, offset, "reg", addr);
if (ret)
{
dprintf(CRITICAL, "Failed to add the memory information addr: %d\n",
ret);
}
ret = fdt_appendprop_u32(fdt, offset, "reg", size);
if (ret)
{
dprintf(CRITICAL, "Failed to add the memory information size: %d\n",
ret);
}
return ret;
}
