static int uniphier_set_fdt_file(void)
{
DECLARE_GLOBAL_DATA_PTR;
const char *compat;
char dtb_name[256];
int buf_len = sizeof(dtb_name);
if (getenv("fdt_file"))
return 0; /* do nothing if it is already set */
compat = fdt_stringlist_get(gd->fdt_blob, 0, "compatible", 0, NULL);
if (!compat)
return -EINVAL;
/* rip off the vendor prefix "socionext," */
compat = strchr(compat, ',');
if (!compat)
return -EINVAL;
compat++;
strncpy(dtb_name, compat, buf_len);
buf_len -= strlen(compat);
strncat(dtb_name, ".dtb", buf_len);
return setenv("fdt_file", dtb_name);
}
static int gpio_dwapb_bind(struct udevice *dev)
{
struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
const void *blob = gd->fdt_blob;
struct udevice *subdev;
fdt_addr_t base;
int ret, node, bank = 0;
/* If this is a child device, there is nothing to do here */
if (plat)
return 0;
base = fdtdec_get_addr(blob, dev_of_offset(dev), "reg");
if (base == FDT_ADDR_T_NONE) {
debug("Can't get the GPIO register base address\n");
return -ENXIO;
}
for (node = fdt_first_subnode(blob, dev_of_offset(dev));
node > 0;
node = fdt_next_subnode(blob, node)) {
if (!fdtdec_get_bool(blob, node, "gpio-controller"))
continue;
plat = NULL;
plat = calloc(1, sizeof(*plat));
if (!plat)
return -ENOMEM;
plat->base = base;
plat->bank = bank;
plat->pins = fdtdec_get_int(blob, node, "snps,nr-gpios", 0);
plat->name = fdt_stringlist_get(blob, node, "bank-name", 0,
NULL);
if (ret)
goto err;
ret = device_bind(dev, dev->driver, plat->name,
plat, -1, &subdev);
if (ret)
goto err;
dev_set_of_offset(subdev, node);
bank++;
}
return 0;
err:
free(plat);
return ret;
}
static int
tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl,
struct tegra_xusb_padctl_group *group,
const void *fdt, int node)
{
unsigned int i;
int len;
group->name = fdt_get_name(fdt, node, &len);
len = fdt_stringlist_count(fdt, node, "nvidia,lanes");
if (len < 0) {
error("failed to parse \"nvidia,lanes\" property");
return -EINVAL;
}
group->num_pins = len;
for (i = 0; i < group->num_pins; i++) {
group->pins[i] = fdt_stringlist_get(fdt, node, "nvidia,lanes",
i, NULL);
if (!group->pins[i]) {
error("failed to read string from \"nvidia,lanes\" property");
return -EINVAL;
}
}
group->num_pins = len;
group->func = fdt_stringlist_get(fdt, node, "nvidia,function", 0, NULL);
if (!group->func) {
error("failed to parse \"nvidia,func\" property");
return -EINVAL;
}
group->iddq = fdtdec_get_int(fdt, node, "nvidia,iddq", -1);
return 0;
}
/**
* exynos_pinctrl_set_state: configure a pin state.
* dev: the pinctrl device to be configured.
* config: the state to be configured.
*/
int exynos_pinctrl_set_state(struct udevice *dev, struct udevice *config)
{
const void *fdt = gd->fdt_blob;
int node = config->of_offset;
unsigned int count, idx, pin_num;
unsigned int pinfunc, pinpud, pindrv;
unsigned long reg, value;
const char *name;
/*
* refer to the following document for the pinctrl bindings
* linux/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
*/
count = fdt_stringlist_count(fdt, node, "samsung,pins");
if (count <= 0)
return -EINVAL;
pinfunc = fdtdec_get_int(fdt, node, "samsung,pin-function", -1);
pinpud = fdtdec_get_int(fdt, node, "samsung,pin-pud", -1);
pindrv = fdtdec_get_int(fdt, node, "samsung,pin-drv", -1);
for (idx = 0; idx < count; idx++) {
name = fdt_stringlist_get(fdt, node, "samsung,pins", idx, NULL);
if (!name)
continue;
reg = pin_to_bank_base(dev, name, &pin_num);
if (pinfunc != -1) {
value = readl(reg + PIN_CON);
value &= ~(0xf << (pin_num << 2));
value |= (pinfunc << (pin_num << 2));
writel(value, reg + PIN_CON);
}
if (pinpud != -1) {
value = readl(reg + PIN_PUD);
value &= ~(0x3 << (pin_num << 1));
value |= (pinpud << (pin_num << 1));
writel(value, reg + PIN_PUD);
}
if (pindrv != -1) {
value = readl(reg + PIN_DRV);
value &= ~(0x3 << (pin_num << 1));
value |= (pindrv << (pin_num << 1));
writel(value, reg + PIN_DRV);
}
}
return 0;
}
const char *dpl_get_connection_endpoint(void *blob, char *endpoint)
{
int connoffset = fdt_path_offset(blob, "/connections"), off;
const char *s1, *s2;
for (off = fdt_first_subnode(blob, connoffset);
off >= 0;
off = fdt_next_subnode(blob, off)) {
s1 = fdt_stringlist_get(blob, off, "endpoint1", 0, NULL);
s2 = fdt_stringlist_get(blob, off, "endpoint2", 0, NULL);
if (!s1 || !s2)
continue;
if (strcmp(endpoint, s1) == 0)
return s2;
if (strcmp(endpoint, s2) == 0)
return s1;
}
return NULL;
}
/**
* fit_conf_print - prints out the FIT configuration details
* @fit: pointer to the FIT format image header
* @noffset: offset of the configuration node
* @p: pointer to prefix string
*
* fit_conf_print() lists all mandatory properties for the processed
* configuration node.
*
* returns:
* no returned results
*/
void fit_conf_print(const void *fit, int noffset, const char *p)
{
char *desc;
const char *uname;
int ret;
int loadables_index;
/* Mandatory properties */
ret = fit_get_desc(fit, noffset, &desc);
printf("%s Description: ", p);
if (ret)
printf("unavailable\n");
else
printf("%s\n", desc);
uname = fdt_getprop(fit, noffset, FIT_KERNEL_PROP, NULL);
printf("%s Kernel: ", p);
if (uname == NULL)
printf("unavailable\n");
else
printf("%s\n", uname);
/* Optional properties */
uname = fdt_getprop(fit, noffset, FIT_RAMDISK_PROP, NULL);
if (uname)
printf("%s Init Ramdisk: %s\n", p, uname);
uname = fdt_getprop(fit, noffset, FIT_FDT_PROP, NULL);
if (uname)
printf("%s FDT: %s\n", p, uname);
uname = fdt_getprop(fit, noffset, FIT_FPGA_PROP, NULL);
if (uname)
printf("%s FPGA: %s\n", p, uname);
/* Print out all of the specified loadables */
for (loadables_index = 0;
uname = fdt_stringlist_get(fit, noffset, FIT_LOADABLE_PROP,
loadables_index, NULL), uname;
loadables_index++) {
if (loadables_index == 0) {
printf("%s Loadables: ", p);
} else {
printf("%s ", p);
}
printf("%s\n", uname);
}
}
/**
* pinctrl_generic_set_state_subnode() - apply all settings in config node
*
* @dev: pin controller device
* @config: pseudo device pointing to config node
* @return: 0 on success, or negative error code on failure
*/
static int pinctrl_generic_set_state_subnode(struct udevice *dev,
struct udevice *config)
{
const void *fdt = gd->fdt_blob;
int node = config->of_offset;
const char *subnode_target_type = "pins";
bool is_group = false;
const char *name;
int strings_count, selector, i, ret;
strings_count = fdt_stringlist_count(fdt, node, subnode_target_type);
if (strings_count < 0) {
subnode_target_type = "groups";
is_group = true;
strings_count = fdt_stringlist_count(fdt, node,
subnode_target_type);
if (strings_count < 0) {
/* skip this node; may contain config child nodes */
return 0;
}
}
for (i = 0; i < strings_count; i++) {
name = fdt_stringlist_get(fdt, node, subnode_target_type, i,
NULL);
if (!name)
return -EINVAL;
if (is_group)
selector = pinctrl_group_name_to_selector(dev, name);
else
selector = pinctrl_pin_name_to_selector(dev, name);
if (selector < 0)
return selector;
ret = pinctrl_generic_set_state_one(dev, config,
is_group, selector);
if (ret)
return ret;
}
return 0;
}
static void check_string(const void *fdt, const char *path,
const char *property, int idx,
const char *string)
{
const char *result;
int offset, len;
offset = fdt_path_offset(fdt, path);
if (offset < 0)
FAIL("Couldn't find path %s", path);
result = fdt_stringlist_get(fdt, offset, property, idx, &len);
if (!result)
FAIL("Couldn't extract string %d from property %s of node %s: %d\n",
idx, property, path, len);
if (strcmp(string, result) != 0)
FAIL("String %d in property %s of node %s is %s, expected %s\n",
idx, property, path, result, string);
}
static int sun4i_spi_parse_pins(struct udevice *dev)
{
const void *fdt = gd->fdt_blob;
const char *pin_name;
const fdt32_t *list;
u32 phandle;
int drive, pull = 0, pin, i;
int offset;
int size;
list = fdt_getprop(fdt, dev_of_offset(dev), "pinctrl-0", &size);
if (!list) {
printf("WARNING: sun4i_spi: cannot find pinctrl-0 node\n");
return -EINVAL;
}
while (size) {
phandle = fdt32_to_cpu(*list++);
size -= sizeof(*list);
offset = fdt_node_offset_by_phandle(fdt, phandle);
if (offset < 0)
return offset;
drive = fdt_getprop_u32_default_node(fdt, offset, 0,
"drive-strength", 0);
if (drive) {
if (drive <= 10)
drive = 0;
else if (drive <= 20)
drive = 1;
else if (drive <= 30)
drive = 2;
else
drive = 3;
} else {
drive = fdt_getprop_u32_default_node(fdt, offset, 0,
"allwinner,drive",
0);
drive = min(drive, 3);
}
if (fdt_get_property(fdt, offset, "bias-disable", NULL))
pull = 0;
else if (fdt_get_property(fdt, offset, "bias-pull-up", NULL))
pull = 1;
else if (fdt_get_property(fdt, offset, "bias-pull-down", NULL))
pull = 2;
else
pull = fdt_getprop_u32_default_node(fdt, offset, 0,
"allwinner,pull",
0);
pull = min(pull, 2);
for (i = 0; ; i++) {
pin_name = fdt_stringlist_get(fdt, offset,
"pins", i, NULL);
if (!pin_name) {
pin_name = fdt_stringlist_get(fdt, offset,
"allwinner,pins",
i, NULL);
if (!pin_name)
break;
}
pin = name_to_gpio(pin_name);
if (pin < 0)
break;
sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SPI0);
sunxi_gpio_set_drv(pin, drive);
sunxi_gpio_set_pull(pin, pull);
}
}
return 0;
}
int boot_get_loadable(int argc, char * const argv[], bootm_headers_t *images,
uint8_t arch, const ulong *ld_start, ulong * const ld_len)
{
/*
* These variables are used to hold the current image location
* in system memory.
*/
ulong tmp_img_addr;
/*
* These two variables are requirements for fit_image_load, but
* their values are not used
*/
ulong img_data, img_len;
void *buf;
int loadables_index;
int conf_noffset;
int fit_img_result;
const char *uname;
uint8_t img_type;
/* Check to see if the images struct has a FIT configuration */
if (!genimg_has_config(images)) {
debug("## FIT configuration was not specified\n");
return 0;
}
/*
* Obtain the os FIT header from the images struct
* copy from dataflash if needed
*/
tmp_img_addr = map_to_sysmem(images->fit_hdr_os);
tmp_img_addr = genimg_get_image(tmp_img_addr);
buf = map_sysmem(tmp_img_addr, 0);
/*
* Check image type. For FIT images get FIT node
* and attempt to locate a generic binary.
*/
switch (genimg_get_format(buf)) {
case IMAGE_FORMAT_FIT:
conf_noffset = fit_conf_get_node(buf, images->fit_uname_cfg);
for (loadables_index = 0;
uname = fdt_stringlist_get(buf, conf_noffset,
FIT_LOADABLE_PROP, loadables_index,
NULL), uname;
loadables_index++)
{
fit_img_result = fit_image_load(images,
tmp_img_addr,
&uname,
&(images->fit_uname_cfg), arch,
IH_TYPE_LOADABLE,
BOOTSTAGE_ID_FIT_LOADABLE_START,
FIT_LOAD_OPTIONAL_NON_ZERO,
&img_data, &img_len);
if (fit_img_result < 0) {
/* Something went wrong! */
return fit_img_result;
}
fit_img_result = fit_image_get_node(buf, uname);
if (fit_img_result < 0) {
/* Something went wrong! */
return fit_img_result;
}
fit_img_result = fit_image_get_type(buf,
fit_img_result,
&img_type);
if (fit_img_result < 0) {
/* Something went wrong! */
return fit_img_result;
}
fit_loadable_process(img_type, img_data, img_len);
}
break;
default:
printf("The given image format is not supported (corrupt?)\n");
return 1;
}
return 0;
}
int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
uint8_t arch, const ulong *ld_start, ulong * const ld_len)
{
ulong tmp_img_addr, img_data, img_len;
void *buf;
int conf_noffset;
int fit_img_result;
const char *uname, *name;
int err;
int devnum = 0; /* TODO support multi fpga platforms */
const fpga_desc * const desc = fpga_get_desc(devnum);
xilinx_desc *desc_xilinx = desc->devdesc;
/* Check to see if the images struct has a FIT configuration */
if (!genimg_has_config(images)) {
debug("## FIT configuration was not specified\n");
return 0;
}
/*
* Obtain the os FIT header from the images struct
* copy from dataflash if needed
*/
tmp_img_addr = map_to_sysmem(images->fit_hdr_os);
tmp_img_addr = genimg_get_image(tmp_img_addr);
buf = map_sysmem(tmp_img_addr, 0);
/*
* Check image type. For FIT images get FIT node
* and attempt to locate a generic binary.
*/
switch (genimg_get_format(buf)) {
case IMAGE_FORMAT_FIT:
conf_noffset = fit_conf_get_node(buf, images->fit_uname_cfg);
uname = fdt_stringlist_get(buf, conf_noffset, FIT_FPGA_PROP, 0,
NULL);
if (!uname) {
debug("## FPGA image is not specified\n");
return 0;
}
fit_img_result = fit_image_load(images,
tmp_img_addr,
(const char **)&uname,
&(images->fit_uname_cfg),
arch,
IH_TYPE_FPGA,
BOOTSTAGE_ID_FPGA_INIT,
FIT_LOAD_OPTIONAL_NON_ZERO,
&img_data, &img_len);
debug("FPGA image (%s) loaded to 0x%lx/size 0x%lx\n",
uname, img_data, img_len);
if (fit_img_result < 0) {
/* Something went wrong! */
return fit_img_result;
}
if (img_len >= desc_xilinx->size) {
name = "full";
err = fpga_loadbitstream(devnum, (char *)img_data,
img_len, BIT_FULL);
if (err)
err = fpga_load(devnum, (const void *)img_data,
img_len, BIT_FULL);
} else {
name = "partial";
err = fpga_loadbitstream(devnum, (char *)img_data,
img_len, BIT_PARTIAL);
if (err)
err = fpga_load(devnum, (const void *)img_data,
img_len, BIT_PARTIAL);
}
if (err)
return err;
printf(" Programming %s bitstream... OK\n", name);
break;
default:
printf("The given image format is not supported (corrupt?)\n");
return 1;
}
return 0;
}
