static void cpu_pci_domain_set_resources(device_t dev) { u32 pci_tolm = find_pci_tolm(dev->link_list); unsigned long tomk = 0, tolmk; int idx; tomk = get_memory_size(); printk(BIOS_DEBUG, "Detected %lu Kbytes (%lu MiB) RAM.\n", tomk, tomk / 1024); /* Compute the top of Low memory */ tolmk = pci_tolm >> 10; if (tolmk >= tomk) { /* The PCI hole does not overlap the memory. */ tolmk = tomk; } /* Report the memory regions. */ idx = 10; ram_resource(dev, idx++, 0, 640); ram_resource(dev, idx++, 768, tolmk - 768); set_top_of_ram(tomk * 1024); assign_resources(dev->link_list); }
static void pci_domain_set_resources(device_t dev) { device_t mc_dev; uint32_t pci_tolm; printk(BIOS_DEBUG, "Entered with dev vid = %x\n", dev->vendor); printk(BIOS_DEBUG, "Entered with dev did = %x\n", dev->device); pci_tolm = find_pci_tolm(dev->link_list); mc_dev = dev->link_list->children->sibling; printk(BIOS_DEBUG, "MC dev vendor = %x\n", mc_dev->vendor); printk(BIOS_DEBUG, "MC dev device = %x\n", mc_dev->device); if (mc_dev) { /* Figure out which areas are/should be occupied by RAM. * This is all computed in kilobytes and converted to/from * the memory controller right at the edges. * Having different variables in different units is * too confusing to get right. Kilobytes are good up to * 4 Terabytes of RAM... */ unsigned long tomk, tolmk; int idx; /* Get the value of the highest DRB. This tells the end of * the physical memory. The units are ticks of 32MB * i.e. 1 means 32MB. */ tomk = (unsigned long)pci_read_config8(mc_dev, 0x43); tomk = tomk * 32 * 1024; /* add vga_mem detection */ tomk = tomk - 16 * 1024; /* Compute the top of Low memory */ tolmk = pci_tolm >> 10; if (tolmk >= tomk) { /* The PCI hole does not overlap memory */ tolmk = tomk; } /* Write the ram configuration registers, * preserving the reserved bits. */ /* Report the memory regions */ printk(BIOS_DEBUG, "tomk = %ld\n", tomk); printk(BIOS_DEBUG, "tolmk = %ld\n", tolmk); idx = 10; /* avoid pam region */ ram_resource(dev, idx++, 0, 640); /* ram_resource(dev, idx++, 1024, tolmk - 1024); */ ram_resource(dev, idx++, 768, tolmk - 768); /* Leave some space for ACPI, PIRQ and MP tables */ high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE; high_tables_size = HIGH_MEMORY_SIZE; } assign_resources(dev->link_list); }
static void pci_domain_set_resources(device_t dev) { static const uint8_t ramregs[] = { 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x56, 0x57 }; device_t mc_dev; uint32_t pci_tolm; pci_tolm = find_pci_tolm(dev->link_list); mc_dev = dev->link_list->children; if (mc_dev) { unsigned long tomk, tolmk; unsigned char rambits; int i, idx; for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) { unsigned char reg; reg = pci_read_config8(mc_dev, ramregs[i]); /* these are ENDING addresses, not sizes. * if there is memory in this slot, then reg will be > rambits. * So we just take the max, that gives us total. * We take the highest one to cover for once and future coreboot * bugs. We warn about bugs. */ if (reg > rambits) rambits = reg; if (reg < rambits) printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n", ramregs[i]); } printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024); tomk = rambits*8*1024; /* Compute the top of Low memory */ tolmk = pci_tolm >> 10; if (tolmk >= tomk) { /* The PCI hole does does not overlap the memory. */ tolmk = tomk; } #if CONFIG_WRITE_HIGH_TABLES == 1 high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE; high_tables_size = HIGH_MEMORY_SIZE; printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); #endif /* Report the memory regions */ idx = 10; ram_resource(dev, idx++, 0, tolmk); } assign_resources(dev->link_list); }
static void pci_domain_set_resources(device_t dev) { device_t mc_dev; u32 pci_tolm; unsigned char reg; unsigned long tomk, tolmk; unsigned char rambits; int idx; pci_tolm = find_pci_tolm(dev->link_list); mc_dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3324, 0); rambits = pci_read_config8(mc_dev, 0x88); rambits >>= 2; /* Get memory size and frame buffer from northbridge's registers. * * If register contains an invalid value we set frame buffer size to a * default of 32M, but that probably won't happen. */ reg = pci_read_config8(mc_dev, 0xa1); reg &= 0x70; reg = reg >> 4; /* TOP 1M SMM Memory */ if (reg == 0x0 || reg == 0x6 || reg == 0x7) tomk = (((rambits << 6) - 32 - 1) * 1024); // Set frame buffer 32M for default else tomk = (((rambits << 6) - (4 << reg) - 1) * 1024); /* Compute the top of Low memory */ tolmk = pci_tolm >> 10; if (tolmk >= tomk) { /* The PCI hole does does not overlap the memory. */ tolmk = tomk; tolmk -= 1024; // TOP 1M SM Memory } #if CONFIG_WRITE_HIGH_TABLES == 1 high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE; high_tables_size = HIGH_MEMORY_SIZE; printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); #endif /* Report the memory regions */ idx = 10; /* TODO: Hole needed? Should this go elsewhere? */ ram_resource(dev, idx++, 0, 640); /* first 640k */ ram_resource(dev, idx++, 768, (tolmk - 768)); /* leave a hole for vga */ assign_resources(dev->link_list); }
static void pci_domain_set_resources(device_t dev) { static const uint8_t ramregs[] = {0x5a, 0x5b, 0x5c, 0x5d }; device_t mc_dev; uint32_t pci_tolm; printk(BIOS_SPEW, "Entering vt8623 pci_domain_set_resources.\n"); pci_tolm = find_pci_tolm(dev->link_list); mc_dev = dev->link_list->children; if (mc_dev) { unsigned long tomk, tolmk; unsigned char rambits; int i, idx; for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) { unsigned char reg; reg = pci_read_config8(mc_dev, ramregs[i]); /* these are ENDING addresses, not sizes. * if there is memory in this slot, then reg will be > rambits. * So we just take the max, that gives us total. * We take the highest one to cover for once and future coreboot * bugs. We warn about bugs. */ if (reg > rambits) rambits = reg; if (reg < rambits) printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n", ramregs[i]); } printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*16*1024); tomk = rambits*16*1024 - 32768; /* Compute the top of Low memory */ tolmk = pci_tolm >> 10; if (tolmk >= tomk) { /* The PCI hole does does not overlap the memory. */ tolmk = tomk; } set_top_of_ram(tolmk * 1024); /* Report the memory regions */ idx = 10; ram_resource(dev, idx++, 0, 640); /* first 640k */ ram_resource(dev, idx++, 768, tolmk - 768); /* leave a hole for vga */ } assign_resources(dev->link_list); }
static void pci_domain_set_resources(device_t dev) { uint32_t pci_tolm; uint8_t tolud, reg8; uint16_t reg16; unsigned long long tomk, tomk_stolen; uint64_t uma_memory_base = 0, uma_memory_size = 0; uint64_t tseg_memory_base = 0, tseg_memory_size = 0; /* Can we find out how much memory we can use at most * this way? */ pci_tolm = find_pci_tolm(dev->link_list); printk(BIOS_DEBUG, "pci_tolm: 0x%x\n", pci_tolm); printk(BIOS_SPEW, "Base of stolen memory: 0x%08x\n", pci_read_config32(dev_find_slot(0, PCI_DEVFN(2, 0)), BSM)); tolud = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), TOLUD); printk(BIOS_SPEW, "Top of Low Used DRAM: 0x%08x\n", tolud << 24); tomk = tolud << 14; tomk_stolen = tomk; /* Note: subtract IGD device and TSEG */ reg16 = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0, 0)), GGC); if (!(reg16 & 2)) { int uma_size = 0; printk(BIOS_DEBUG, "IGD decoded, subtracting "); reg16 >>= 4; reg16 &= 7; switch (reg16) { case 1: uma_size = 1024; break; case 3: uma_size = 8192; break; } printk(BIOS_DEBUG, "%dM UMA\n", uma_size >> 10); tomk_stolen -= uma_size; /* For reserving UMA memory in the memory map */ uma_memory_base = tomk_stolen * 1024ULL; uma_memory_size = uma_size * 1024ULL; }
static void pci_domain_set_resources(device_t dev) { device_t mc_dev; uint32_t pci_tolm; printk(BIOS_SPEW, "%s\n", __func__); pci_tolm = find_pci_tolm(dev->link_list); mc_dev = dev->link_list->children; if (mc_dev) { unsigned long tomk, tolmk; // unsigned char rambits; // int i; int idx; #if 0 for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) { unsigned char reg; reg = pci_read_config8(mc_dev, ramregs[i]); /* these are ENDING addresses, not sizes. * if there is memory in this slot, then reg will be > rambits. * So we just take the max, that gives us total. * We take the highest one to cover for once and future coreboot * bugs. We warn about bugs. */ if (reg > rambits) rambits = reg; if (reg < rambits) printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n", ramregs[i]); } printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024); tomk = rambits*8*1024; #endif tomk = 32 * 1024; /* Compute the top of Low memory */ tolmk = pci_tolm >> 10; if (tolmk >= tomk) { /* The PCI hole does does not overlap the memory. */ tolmk = tomk; } /* Report the memory regions */ idx = 10; ram_resource(dev, idx++, 0, tolmk); } assign_resources(dev->link_list); }
static void i440lx_domain_set_resources(device_t dev) { device_t mc_dev; uint32_t pci_tolm; pci_tolm = find_pci_tolm(dev->link_list); mc_dev = dev->link_list->children; if (mc_dev) { unsigned long tomk, tolmk; int idx; /* Figure out which areas are/should be occupied by RAM. The * value of the highest DRB denotes the end of the physical * memory (in units of 8MB). */ tomk = ((unsigned long)pci_read_config8(mc_dev, DRB7)); /* Convert to KB. */ tomk *= (8 * 1024); printk(BIOS_DEBUG, "Setting RAM size to %lu MB\n", tomk / 1024); /* Compute the top of low memory. */ tolmk = pci_tolm / 1024; if (tolmk >= tomk) { /* The PCI hole does not overlap the memory. */ tolmk = tomk; } /* Report the memory regions. */ idx = 10; ram_resource(dev, idx++, 0, 640); ram_resource(dev, idx++, 768, tolmk - 768); #if CONFIG_WRITE_HIGH_TABLES==1 /* Leave some space for ACPI, PIRQ and MP tables */ high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE; high_tables_size = HIGH_MEMORY_SIZE; #endif } assign_resources(dev->link_list); }
static void i440bx_domain_set_resources(device_t dev) { device_t mc_dev; uint32_t pci_tolm; pci_tolm = find_pci_tolm(dev->link_list); mc_dev = dev->link_list->children; if (mc_dev) { unsigned long tomk, tolmk; int idx; /* Figure out which areas are/should be occupied by RAM. The * value of the highest DRB denotes the end of the physical * memory (in units of 8MB). */ tomk = ((unsigned long)pci_read_config8(mc_dev, DRB7)); /* Convert to KB. */ tomk *= (8 * 1024); printk(BIOS_DEBUG, "Setting RAM size to %ld MB\n", tomk / 1024); /* Compute the top of low memory. */ tolmk = pci_tolm / 1024; if (tolmk >= tomk) { /* The PCI hole does not overlap the memory. */ tolmk = tomk; } /* Report the memory regions. */ idx = 10; ram_resource(dev, idx++, 0, 640); ram_resource(dev, idx++, 768, tolmk - 768); set_top_of_ram(tomk * 1024); } assign_resources(dev->link_list); }
static void pci_domain_set_resources(device_t dev) { /* * the order is important to find the correct RAM size. */ u8 ramregs[] = { 0x43, 0x42, 0x41, 0x40 }; device_t mc_dev; u32 pci_tolm; u8 reg; printk(BIOS_SPEW, "Entering vx800 pci_domain_set_resources.\n"); pci_tolm = find_pci_tolm(dev->link_list); mc_dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VX855_MEMCTRL, 0); if (mc_dev) { unsigned long tomk, tolmk; unsigned char rambits; u8 i, idx; /* * once the register value is not zero, the ramsize is * this register's value multiply 64 * 1024 * 1024 */ for (rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) { rambits = pci_read_config8(mc_dev, ramregs[i]); if (rambits != 0) break; } /* Get memory size and frame buffer from northbridge's registers. if register with invalid value we set frame buffer size to 32M for default, but it won't happen. */ reg = pci_read_config8(mc_dev, 0xa1); reg &= 0x70; reg = reg >> 4; /* TOP 1M SM Memory */ if (reg == 0x0) tomk = (((rambits << 6) - 32 - VIACONFIG_TOP_SM_SIZE_MB) * 1024); // Set frame buffer 32M for default else tomk = (((rambits << 6) - (4 << reg) - VIACONFIG_TOP_SM_SIZE_MB) * 1024); printk(BIOS_SPEW, "tomk is 0x%lx\n", tomk); /* Compute the Top Of Low Memory, in Kb */ tolmk = pci_tolm >> 10; if (tolmk >= tomk) { /* The PCI hole does does not overlap the memory. */ tolmk = tomk; } /* Report the memory regions */ idx = 10; /* TODO: Hole needed? */ ram_resource(dev, idx++, 0, 640); /* first 640k */ /* Leave a hole for vga, 0xa0000 - 0xc0000 */ ram_resource(dev, idx++, 768, (tolmk - 768)); } assign_resources(dev->link_list); }