/*----------------------------------------------------------------------------*/
int
tres_mem_arch_pf_store_step(int id, const uint8_t * buf, int len)
{
int j;
uint16_t tmp;
uint8_t *tmp8;
DBG_PRINTF("tres_mem_arch_pf_store_step()\n");
// ensure that we don't exceed the slot limit
DBG_PRINTF("Len: %d\n", len);
DBG_PRINTF("Cur: %x\n", cur[id]);
DBG_PRINTF("SLOT_END_ADDR: %x\n", SLOT_END_ADDR(id));
if(((SLOT_END_ADDR(id)) - cur[id]) < len) {
return -1;
}
flash_setup();
// write to flash
tmp8 = (uint8_t *) &tmp;
for(j = 0; j < len; j += 2) {
// we need this because buf may be misaligned
tmp8[0] = buf[j];
// don't worry about possible buffer overflow in read mode
tmp8[1] = buf[j + 1];
DBG_PRINTF("Writing @%x\n", cur[id]);
flash_write((unsigned short *)cur[id], tmp);
cur[id] += 2;
}
return 0;
}
int main()
{
unsigned int* memspot = (unsigned int*)SECTOR1; //We need a means of addressing our Flash
char stringVal[3] = "HI"; //Lets store "HI"
flash_setup(); //set flash divider (This is for a 24MHz Bus clock, and a 8MHz Oscillator)
int result = 0; //Lets get the size of the function to copy
char* p2 = (char*)copybuf; //pointer to the memory base of cmpbuf
char* p1 = (char*)program_flash; //pointer to the memory base of setflag
int size = p2 - p1; //subtract the two addresses
unsigned char code_array[size]; //reserve spot on the stack to copy the function to
copybuf((unsigned char*)program_flash, code_array, size); //cast function (cause its void)
result = cmpbuf((unsigned char*)program_flash, code_array, size); //again cast
if(result == 0)
{
printf("Copy Success");
}
else
{
printf("Copy Failed!");
}
printf("Pre Function Call: %x", *memspot);
typedef void (*PF)(unsigned int*, char*); //this type defines PF as a pointer to a function that whose type is void and takes no parameters
((PF)code_array)(memspot, stringVal); //call the function from RAM now
printf("Post Function Call: %x", *memspot);
return 0;
}
/*---------------------------------------------------------------------------*/
void
node_id_burn(unsigned short id)
{
unsigned char data[10];
unsigned short val;
data[0] = magic_id[0];
data[1] = magic_id[1];
data[2] = 0x02;
data[3] = 0x12;
data[4] = 0x74;
data[5] = 0x00;
data[6] = 0x00;
data[7] = 0x01;
#if 0
flash_setup();
flash_clear((unsigned long)ADDR_INFOMEM_A);
memcpy(&val, &data[0], 2);
flash_write((unsigned long)ADDR_INFOMEM_A, val);
memcpy(&val, &data[2], 2);
flash_write((unsigned long)(ADDR_INFOMEM_A + 2), val);
memcpy(&val, &data[4], 2);
flash_write((unsigned long)(ADDR_INFOMEM_A + 4), val);
memcpy(&val, &data[6], 2);
flash_write((unsigned long)(ADDR_INFOMEM_A + 6), val);
flash_write((unsigned long)(ADDR_INFOMEM_A + 8), id);
flash_done();
#endif
}
static void erasearea_flash(void *start, size_t size) {
#if USE_BLOCKWRITING
rom_erase(size, (off_t)(uintptr_t)start);
#endif
flash_setup();
while (size > ROM_ERASE_UNIT_SIZE) {
flash_clear(start);
size -= ROM_ERASE_UNIT_SIZE;
start = (char*) start + ROM_ERASE_UNIT_SIZE;
}
flash_done();
}
/**
* The entry point to the application.
*/
int main(void) {
/* Hardware Setup - Don't leave MCLK floating */
LPC_GPIO0->DIR |= (1 << 1);
SystemInit();
/* Start the SPI Bus first, that's really important */
general_spi_init();
/* Power monitoring - Turn off the battery measurement circuit */
pwrmon_init();
/* LED */
LED_ON();
/* Initialise the flash memory first so this gets off the SPI bus */
flash_spi_init();
flash_init();
flash_setup();
spi_shutdown();
/* Optionally wipe the memory. This may take a few seconds... */
wipe_mem();
/* Initialise the memory writing code */
init_write();
/* Try to initialise the audio interface */
if (wm8737_init() < 0) { /* If it fails */
while (1); /* Wait here forever! */
}
/**
* This delay of approximately 5 seconds is so we can
* re-program the chip before it goes to sleep
*/
uint32_t i = 1000*1000*3;
while (i-- > 0);
/* Initialise the radio stack */
radio_init(radio_rx_callback);
/* Initialise the time */
time_init();
/* Sleep forever, let the wakeup loop in sleeping.c handle everything */
infinite_deep_sleep();
return 0;
}
static size_t memwrite_flash(void *dest, void *src, size_t len) {
#if USE_BLOCKWRITING
return rom_pwrite(src, len, (off_t)(uintptr_t)dest);
// The compiler will remove everything from this point on.
// -> No #elsif needed
#endif /* USE_BLOCKWRITING */
size_t written = 0;
unsigned short *lcldest = dest;
char *lclsrc = src;
unsigned short ow;
char *owptr = (char*) (&ow);
#if DEBUG
if ((uintptr_t) dest & 1) {
puts("Alignment FAIL");
}
#endif
//DPRINTF("Flash: %x\n", ow);
//watchdog_periodic();
#if 1 != FBENCHMARK
flash_setup();
#endif
while ((len & ~0x1) > written) {
owptr[0] = *lclsrc++;
owptr[1] = *lclsrc++;
#if 1 !=FBENCHMARK
flash_write(lcldest, ow);
#if DEBUG
printf("WRT: %p, %d, %d\n", lcldest, ow, *lcldest);
watchdog_periodic();
if (ow != *lcldest) {
printf("PANIC!");
while (1)
;
}
#endif
lcldest++;
#endif
written += 2;
}
#if 1 != FBENCHMARK
flash_done();
IFG1 |= UTXIFG0;
#endif
return written;
}
void
nvm_data_write(void)
{
uint8_t i;
uint16_t *flash_ptr = (uint16_t *)CETIC_6LBR_NVM_ADDRESS;
uint16_t *data = (uint16_t *)&nvm_data;
flash_setup();
flash_clear((unsigned short *)flash_ptr);
for(i = 0; i < CETIC_6LBR_NVM_SIZE/2; i++)
{
flash_write((unsigned short *)flash_ptr, *data);
flash_ptr++;
data++;
}
flash_done();
LOG6LBR_INFO("Flashing 6LBR NVM done\n");
}
/*--------------------------------------------------------------------------*/
int
main(int argc, char **argv)
{
/*
* Initalize hardware.
*/
msp430_cpu_init();
clock_init();
leds_init();
leds_on(LEDS_RED);
uart1_init(BAUD2UBR(115200)); /* Must come before first printf */
#if NETSTACK_CONF_WITH_IPV4
slip_arch_init(BAUD2UBR(115200));
#endif /* NETSTACK_CONF_WITH_IPV4 */
leds_on(LEDS_GREEN);
/* xmem_init(); */
rtimer_init();
lcd_init();
PRINTF(CONTIKI_VERSION_STRING "\n");
/*
* Hardware initialization done!
*/
leds_on(LEDS_RED);
/* Restore node id if such has been stored in external mem */
// node_id_restore();
#ifdef NODEID
node_id = NODEID;
#ifdef BURN_NODEID
flash_setup();
flash_clear(0x1800);
flash_write(0x1800, node_id);
flash_done();
#endif /* BURN_NODEID */
#endif /* NODE_ID */
if(node_id == 0) {
node_id = *((unsigned short *)0x1800);
}
memset(node_mac, 0, sizeof(node_mac));
node_mac[6] = node_id >> 8;
node_mac[7] = node_id & 0xff;
/* for setting "hardcoded" IEEE 802.15.4 MAC addresses */
#ifdef MAC_1
{
uint8_t ieee[] = { MAC_1, MAC_2, MAC_3, MAC_4, MAC_5, MAC_6, MAC_7, MAC_8 };
memcpy(node_mac, ieee, sizeof(uip_lladdr.addr));
}
#endif
/*
* Initialize Contiki and our processes.
*/
process_init();
process_start(&etimer_process, NULL);
ctimer_init();
set_rime_addr();
cc2420_init();
{
uint8_t longaddr[8];
uint16_t shortaddr;
shortaddr = (linkaddr_node_addr.u8[0] << 8) +
linkaddr_node_addr.u8[1];
memset(longaddr, 0, sizeof(longaddr));
linkaddr_copy((linkaddr_t *)&longaddr, &linkaddr_node_addr);
printf("MAC %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
longaddr[0], longaddr[1], longaddr[2], longaddr[3],
longaddr[4], longaddr[5], longaddr[6], longaddr[7]);
cc2420_set_pan_addr(IEEE802154_PANID, shortaddr, longaddr);
}
leds_off(LEDS_ALL);
if(node_id > 0) {
PRINTF("Node id %u.\n", node_id);
} else {
PRINTF("Node id not set.\n");
}
#if NETSTACK_CONF_WITH_IPV6
memcpy(&uip_lladdr.addr, node_mac, sizeof(uip_lladdr.addr));
/* Setup nullmac-like MAC for 802.15.4 */
queuebuf_init();
NETSTACK_RDC.init();
NETSTACK_MAC.init();
NETSTACK_NETWORK.init();
printf("%s %lu %u\n",
NETSTACK_RDC.name,
CLOCK_SECOND / (NETSTACK_RDC.channel_check_interval() == 0 ? 1:
NETSTACK_RDC.channel_check_interval()),
CC2420_CONF_CHANNEL);
process_start(&tcpip_process, NULL);
printf("IPv6 ");
{
uip_ds6_addr_t *lladdr;
int i;
lladdr = uip_ds6_get_link_local(-1);
for(i = 0; i < 7; ++i) {
printf("%02x%02x:", lladdr->ipaddr.u8[i * 2],
lladdr->ipaddr.u8[i * 2 + 1]);
}
printf("%02x%02x\n", lladdr->ipaddr.u8[14], lladdr->ipaddr.u8[15]);
}
if(!UIP_CONF_IPV6_RPL) {
uip_ipaddr_t ipaddr;
int i;
uip_ip6addr(&ipaddr, UIP_DS6_DEFAULT_PREFIX, 0, 0, 0, 0, 0, 0, 0);
uip_ds6_set_addr_iid(&ipaddr, &uip_lladdr);
uip_ds6_addr_add(&ipaddr, 0, ADDR_TENTATIVE);
printf("Tentative global IPv6 address ");
for(i = 0; i < 7; ++i) {
printf("%02x%02x:",
ipaddr.u8[i * 2], ipaddr.u8[i * 2 + 1]);
}
printf("%02x%02x\n",
ipaddr.u8[7 * 2], ipaddr.u8[7 * 2 + 1]);
}
#else /* NETSTACK_CONF_WITH_IPV6 */
NETSTACK_RDC.init();
NETSTACK_MAC.init();
NETSTACK_NETWORK.init();
printf("%s %lu %u\n",
NETSTACK_RDC.name,
CLOCK_SECOND / (NETSTACK_RDC.channel_check_interval() == 0? 1:
NETSTACK_RDC.channel_check_interval()),
CC2420_CONF_CHANNEL);
#endif /* NETSTACK_CONF_WITH_IPV6 */
#if !NETSTACK_CONF_WITH_IPV6
uart1_set_input(serial_line_input_byte);
serial_line_init();
#endif
#if TIMESYNCH_CONF_ENABLED
timesynch_init();
timesynch_set_authority_level(linkaddr_node_addr.u8[0]);
#endif /* TIMESYNCH_CONF_ENABLED */
/* process_start(&sensors_process, NULL);
SENSORS_ACTIVATE(button_sensor);*/
energest_init();
ENERGEST_ON(ENERGEST_TYPE_CPU);
print_processes(autostart_processes);
autostart_start(autostart_processes);
duty_cycle_scroller_start(CLOCK_SECOND * 2);
/*
* This is the scheduler loop.
*/
watchdog_start();
watchdog_stop(); /* Stop the wdt... */
while(1) {
int r;
do {
/* Reset watchdog. */
watchdog_periodic();
r = process_run();
} while(r > 0);
/*
* Idle processing.
*/
int s = splhigh(); /* Disable interrupts. */
/* uart1_active is for avoiding LPM3 when still sending or receiving */
if(process_nevents() != 0 || uart1_active()) {
splx(s); /* Re-enable interrupts. */
} else {
static unsigned long irq_energest = 0;
/* Re-enable interrupts and go to sleep atomically. */
ENERGEST_SWITCH(ENERGEST_TYPE_CPU, ENERGEST_TYPE_LPM);
/* We only want to measure the processing done in IRQs when we
are asleep, so we discard the processing time done when we
were awake. */
energest_type_set(ENERGEST_TYPE_IRQ, irq_energest);
watchdog_stop();
_BIS_SR(GIE | SCG0 | SCG1 | CPUOFF); /* LPM3 sleep. This
statement will block
until the CPU is
woken up by an
interrupt that sets
the wake up flag. */
/* We get the current processing time for interrupts that was
done during the LPM and store it for next time around. */
dint();
irq_energest = energest_type_time(ENERGEST_TYPE_IRQ);
eint();
watchdog_start();
ENERGEST_SWITCH(ENERGEST_TYPE_LPM, ENERGEST_TYPE_CPU);
}
}
}
