void genc_sf_d() { #ifdef INTERPRET_C_SF_D gencallinterp((unsigned long)C_SF_D, 0); #else gencheck_cop1_unusable(); mov_eax_memoffs32((unsigned long*)(®_cop1_double[dst->f.cf.ft])); fld_preg32_qword(EAX); mov_eax_memoffs32((unsigned long*)(®_cop1_double[dst->f.cf.fs])); fld_preg32_qword(EAX); fcomip_fpreg(1); ffree_fpreg(0); and_m32_imm32((unsigned long*)&FCR31, ~0x800000); #endif }
void genc_sf_d(usf_state_t * state) { #ifdef INTERPRET_C_SF_D gencallinterp(state, (unsigned int)state->current_instruction_table.C_SF_D, 0); #else gencheck_cop1_unusable(state); mov_eax_memoffs32(state, (unsigned int*)(&state->reg_cop1_double[state->dst->f.cf.ft])); fld_preg32_qword(state, EAX); mov_eax_memoffs32(state, (unsigned int*)(&state->reg_cop1_double[state->dst->f.cf.fs])); fld_preg32_qword(state, EAX); fcomip_fpreg(state, 1); ffree_fpreg(state, 0); and_m32_imm32(state, (unsigned int*)&state->FCR31, ~0x800000); #endif }
void genc_olt_d(usf_state_t * state) { #ifdef INTERPRET_C_OLT_D gencallinterp(state, (unsigned int)state->current_instruction_table.C_OLT_D, 0); #else gencheck_cop1_unusable(state); mov_eax_memoffs32(state, (unsigned int*)(&state->reg_cop1_double[state->dst->f.cf.ft])); fld_preg32_qword(state, EAX); mov_eax_memoffs32(state, (unsigned int*)(&state->reg_cop1_double[state->dst->f.cf.fs])); fld_preg32_qword(state, EAX); fucomip_fpreg(state, 1); ffree_fpreg(state, 0); jae_rj(state, 12); // 2 or_m32_imm32(state, (unsigned int*)&state->FCR31, 0x800000); // 10 jmp_imm_short(state, 10); // 2 and_m32_imm32(state, (unsigned int*)&state->FCR31, ~0x800000); // 10 #endif }
void genc_le_d() { #ifdef INTERPRET_C_LE_D gencallinterp((unsigned long)C_LE_D, 0); #else gencheck_cop1_unusable(); mov_eax_memoffs32((unsigned long*)(®_cop1_double[dst->f.cf.ft])); fld_preg32_qword(EAX); mov_eax_memoffs32((unsigned long*)(®_cop1_double[dst->f.cf.fs])); fld_preg32_qword(EAX); fcomip_fpreg(1); ffree_fpreg(0); ja_rj(12); // 2 or_m32_imm32((unsigned long*)&FCR31, 0x800000); // 10 jmp_imm_short(10); // 2 and_m32_imm32((unsigned long*)&FCR31, ~0x800000); // 10 #endif }
void genc_ueq_d(void) { #ifdef INTERPRET_C_UEQ_D gencallinterp((unsigned int)C_UEQ_D, 0); #else gencheck_cop1_unusable(); mov_eax_memoffs32((unsigned int*)(®_cop1_double[dst->f.cf.ft])); fld_preg32_qword(EAX); mov_eax_memoffs32((unsigned int*)(®_cop1_double[dst->f.cf.fs])); fld_preg32_qword(EAX); fucomip_fpreg(1); ffree_fpreg(0); jp_rj(14); jne_rj(12); or_m32_imm32((unsigned int*)&FCR31, 0x800000); // 10 jmp_imm_short(10); // 2 and_m32_imm32((unsigned int*)&FCR31, ~0x800000); // 10 #endif }
void gencvt_l_d(usf_state_t * state) { #ifdef INTERPRET_CVT_L_D gencallinterp(state, (unsigned int)state->current_instruction_table.CVT_L_D, 0); #else gencheck_cop1_unusable(state); mov_eax_memoffs32(state, (unsigned int*)(&state->reg_cop1_double[state->dst->f.cf.fs])); fld_preg32_qword(state, EAX); mov_eax_memoffs32(state, (unsigned int*)(&state->reg_cop1_double[state->dst->f.cf.fd])); fistp_preg32_qword(state, EAX); #endif }
void gencvt_l_d() { #ifdef INTERPRET_CVT_L_D gencallinterp((unsigned long)CVT_L_D, 0); #else gencheck_cop1_unusable(); mov_eax_memoffs32((unsigned long*)(®_cop1_double[dst->f.cf.fs])); fld_preg32_qword(EAX); mov_eax_memoffs32((unsigned long*)(®_cop1_double[dst->f.cf.fd])); fistp_preg32_qword(EAX); #endif }
void gencvt_s_d(void) { #ifdef INTERPRET_CVT_S_D gencallinterp((unsigned int)CVT_S_D, 0); #else gencheck_cop1_unusable(); mov_eax_memoffs32((unsigned int*)(®_cop1_double[dst->f.cf.fs])); fld_preg32_qword(EAX); mov_eax_memoffs32((unsigned int*)(®_cop1_simple[dst->f.cf.fd])); fstp_preg32_dword(EAX); #endif }
void genfloor_w_d(usf_state_t * state) { #ifdef INTERPRET_FLOOR_W_D gencallinterp(state, (unsigned int)state->current_instruction_table.FLOOR_W_D, 0); #else gencheck_cop1_unusable(state); fldcw_m16(state, (unsigned short*)&state->floor_mode); mov_eax_memoffs32(state, (unsigned int*)(&state->reg_cop1_double[state->dst->f.cf.fs])); fld_preg32_qword(state, EAX); mov_eax_memoffs32(state, (unsigned int*)(&state->reg_cop1_simple[state->dst->f.cf.fd])); fistp_preg32_dword(state, EAX); fldcw_m16(state, (unsigned short*)&state->rounding_mode); #endif }
void genfloor_w_d() { #ifdef INTERPRET_FLOOR_W_D gencallinterp((unsigned long)FLOOR_W_D, 0); #else gencheck_cop1_unusable(); fldcw_m16((unsigned short*)&floor_mode); mov_eax_memoffs32((unsigned long*)(®_cop1_double[dst->f.cf.fs])); fld_preg32_qword(EAX); mov_eax_memoffs32((unsigned long*)(®_cop1_simple[dst->f.cf.fd])); fistp_preg32_dword(EAX); fldcw_m16((unsigned short*)&rounding_mode); #endif }
void genceil_l_d() { #ifdef INTERPRET_CEIL_L_D gencallinterp((unsigned long)CEIL_L_D, 0); #else gencheck_cop1_unusable(); fldcw_m16((unsigned short*)&ceil_mode); mov_eax_memoffs32((unsigned long*)(®_cop1_double[dst->f.cf.fs])); fld_preg32_qword(EAX); mov_eax_memoffs32((unsigned long*)(®_cop1_double[dst->f.cf.fd])); fistp_preg32_qword(EAX); fldcw_m16((unsigned short*)&rounding_mode); #endif }
void genmul_d(void) { #ifdef INTERPRET_MUL_D gencallinterp((unsigned int)MUL_D, 0); #else gencheck_cop1_unusable(); mov_eax_memoffs32((unsigned int *)(®_cop1_double[dst->f.cf.fs])); fld_preg32_qword(EAX); mov_eax_memoffs32((unsigned int *)(®_cop1_double[dst->f.cf.ft])); fmul_preg32_qword(EAX); mov_eax_memoffs32((unsigned int *)(®_cop1_double[dst->f.cf.fd])); fstp_preg32_qword(EAX); #endif }
void gentrunc_w_d(void) { #ifdef INTERPRET_TRUNC_W_D gencallinterp((unsigned int)TRUNC_W_D, 0); #else gencheck_cop1_unusable(); fldcw_m16((unsigned short*)&trunc_mode); mov_eax_memoffs32((unsigned int*)(®_cop1_double[dst->f.cf.fs])); fld_preg32_qword(EAX); mov_eax_memoffs32((unsigned int*)(®_cop1_simple[dst->f.cf.fd])); fistp_preg32_dword(EAX); fldcw_m16((unsigned short*)&rounding_mode); #endif }