void ProgAlgXC3S::array_program(BitFile &file)
{
  flow_enable();
  /* JPROGAM: Trigerr reconfiguration, not explained in ug332, but
     DS099 Figure 28:  Boundary-Scan Configuration Flow Diagram (p.49) */
  jtag->shiftIR(&JPROGRAM);

  switch(family)
    {
    case 0x11: /* XC3SA*/
    case 0x13: /* XC3SAN*/
    case 0x1c: /* SC3SADSP*/
      {
	byte data[8];
	jtag->shiftIR(&ISC_DNA);
	jtag->shiftDR(0, data, 64);
	io->cycleTCK(1);
	if (*(long*)data != -1L)
	  /* ISC_DNA only works on a unconfigured device, see AR #29977*/
	  printf("DNA is 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
		 data[0], data[1], data[2], data[3],
		 data[4], data[5], data[6], data[7]);
	break;
      }
    }

  /* use leagcy, if large transfers are faster then chunks */
  flow_program_legacy(file);
  /*flow_array_program(file);*/
  flow_disable();
}
示例#2
0
void ProgAlgXC3S::getDNA()
{
  unsigned char buf[1] = {0};
  int i = 0;
  
  flow_enable();
  jtag->shiftIR(&JPROGRAM);

  do
    jtag->shiftIR(&CFG_IN, buf);
  while (! (buf[0] & 0x10)); /* wait until configuration cleared */
  
  switch(family)
  {
    case 0x11: /* XC3SA*/
    case 0x13: /* XC3SAN*/
    case 0x1c: /* SC3SADSP*/
    case 0x20: /* XC6S*/
    {
      byte data[8];
      jtag->shiftIR(&ISC_ENABLE);
      jtag->shiftIR(&ISC_DNA);
      jtag->shiftDR(0, data, 64);
      io->cycleTCK(1);
      if (*(long*)data != -1L)
        printf("DNA is 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
          data[0], data[1], data[2], data[3],
          data[4], data[5], data[6], data[7]);
      break;
    }
  }
  flow_disable();
}
void ProgAlgXC3S::array_program(BitFile &file)
{
  unsigned char buf[1] = {0};
  int i = 0;
  
  flow_enable();
  /* JPROGAM: Trigerr reconfiguration, not explained in ug332, but
     DS099 Figure 28:  Boundary-Scan Configuration Flow Diagram (p.49) */
  jtag->shiftIR(&JPROGRAM);

  do
    jtag->shiftIR(&CFG_IN, buf);
  while (! (buf[0] & 0x10)); /* wait until configuration cleared */
  switch(family)
    {
    case 0x11: /* XC3SA*/
    case 0x13: /* XC3SAN*/
    case 0x1c: /* SC3SADSP*/
    case 0x20: /* XC6S*/
      {
	byte data[8];
	jtag->shiftIR(&ISC_ENABLE);
	jtag->shiftIR(&ISC_DNA);
	jtag->shiftDR(0, data, 64);
	io->cycleTCK(1);
	if (*(long*)data != -1L)
	  /* ISC_DNA only works on a unconfigured device, see AR #29977*/
    if (io->getVerbose())
	    printf("DNA is 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
		   data[0], data[1], data[2], data[3],
		   data[4], data[5], data[6], data[7]);
	break;
      }
    }

  /* use leagcy, if large transfers are faster then chunks */
  flow_program_legacy(file);
  /*flow_array_program(file);*/
  flow_disable();

  /* Wait until device comes up */
  while ((( buf[0] & 0x23) != 0x21) && (i <50))
    {
      jtag->shiftIR(&BYPASS, buf);
      jtag->Usleep(1000);
      i++;
    }
  if (i == 50)
    fprintf(stderr, 
	    "Device failed to configure, INSTRUCTION_CAPTURE is 0x%02x\n",
	    buf[0]);
}
示例#4
0
void ProgAlgXC3S::array_program(BitFile &file)
{
  unsigned char buf[1] = {0};
  int i = 0;

  if (family == FAMILY_XC2S || family == FAMILY_XC2SE)
      return flow_program_xc2s(file);
  
  flow_enable();

  /* JPROGAM: Triger reconfiguration, not explained in ug332, but
     DS099 Figure 28:  Boundary-Scan Configuration Flow Diagram (p.49) */
  jtag->shiftIR(JPROGRAM);
  do
    jtag->shiftIR(CFG_IN, buf);
  while (! (buf[0] & 0x10)); /* wait until configuration cleared */

  /* As ISC_DNA only works on a unconfigured device, see AR #29977*/
  switch(family)
    {
    case 0x11: /* XC3SA*/
    case 0x13: /* XC3SAN*/
    case 0x1c: /* SC3SADSP*/
    case 0x20: /* SC3SADSP*/
      {
	byte data[8];
	jtag->shiftIR(ISC_ENABLE);
	jtag->shiftIR(ISC_DNA);
	jtag->shiftDR(0, data, 64);
	jtag->cycleTCK(1);
	if (*(long long*)data != -1LL)
	  /* ISC_DNA only works on a unconfigured device, see AR #29977*/
	  fprintf(stderr, "DNA is 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 
		 data[0], data[1], data[2], data[3], 
		 data[4], data[5], data[6], data[7]);
	break;
      }
    }

  /* use legacy, as large USB transfers are faster then chunks */
  flow_program_legacy(file);
  /*flow_array_program(file);*/
  flow_disable();

  /* NOTE: Virtex7 devices do not support flow_program_legacy according
     to the Xilinx IEEE 1532 files. However, my tests with flow_array_program
     failed, while flow_program_legacy appears to work just fine on XC7VX690T.
     (jorisvr) */

  /* Wait until device comes up */
  while ((( buf[0] & 0x23) != 0x21) && (i <50))
    {
      jtag->shiftIR(BYPASS, buf);
      jtag->Usleep(1000);
      i++;
    }
  if (i == 50)
    fprintf(stderr, 
	    "Device failed to configure, INSTRUCTION_CAPTURE is 0x%02x\n",
	    buf[0]);
}