C++ (Cpp) fpga_config_use_hci示例

示例#1

文件： ohci_sunxi.c 项目： GREYFOXRGR/BPI-M3-bsp

static int sunxi_ohci_hcd_resume(struct device *dev)
{
	struct sunxi_hci_hcd *sunxi_ohci = NULL;
	struct usb_hcd *hcd = NULL;

	if(dev == NULL){
		DMSG_PANIC("ERR: Argment is invalid\n");
		return 0;
	}

	hcd = dev_get_drvdata(dev);
	if(hcd == NULL){
		DMSG_PANIC("ERR: hcd is null\n");
		return 0;
	}

	sunxi_ohci = dev->platform_data;
	if(sunxi_ohci == NULL){
		DMSG_PANIC("ERR: sunxi_ohci is null\n");
		return 0;
	}

	if(sunxi_ohci->probe == 0){
		DMSG_PANIC("ERR: sunxi_ohci is disable, can not resume\n");
		return 0;
	}

	if(sunxi_ohci->not_suspend){
		DMSG_INFO("[%s]: controller not suspend, need not resume\n", sunxi_ohci->hci_name);
#if defined (CONFIG_ARCH_SUN8IW6) || defined (CONFIG_ARCH_SUN9IW1)
		sunxi_ohci->hci_phy_ctrl(sunxi_ohci, 1);
#endif
		scene_unlock(&ohci_standby_lock[sunxi_ohci->usbc_no]);
		disable_wakeup_src(CPUS_USBMOUSE_SRC, 0);

#ifdef CONFIG_USB_HCD_ENHANCE
		if(sunxi_ohci->usbc_no == 1){
			atomic_set(&hci1_thread_scan_flag, 1);
		}

		if(sunxi_ohci->usbc_no == 3){
			atomic_set(&hci3_thread_scan_flag, 1);
		}
#endif
	}else{
		DMSG_INFO("[%s]: sunxi_ohci_hcd_resume\n", sunxi_ohci->hci_name);

#ifndef CONFIG_ARCH_SUN9IW1
#ifdef  SUNXI_USB_FPGA
		fpga_config_use_hci((__u32 __force)sunxi_ohci->sram_vbase);
#endif
#endif
		sunxi_start_ohci(sunxi_ohci);

		set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
		ohci_finish_controller_resume(hcd);
	}

	return 0;
}

示例#2

文件： sunxi_hci.c 项目： alex-deng/a33_linux

static int init_sunxi_hci(struct sunxi_hci_hcd *sunxi_hci, u32 usbc_no, u32 ohci, const char *hci_name)
{
	s32 ret = 0;

	memset(sunxi_hci, 0, sizeof(struct sunxi_hci_hcd));

	sunxi_hci->usbc_no = usbc_no;
	sunxi_hci->usbc_type = ohci ? SUNXI_USB_OHCI : SUNXI_USB_EHCI;

	if(ohci){
		sunxi_hci->irq_no = ohci_irq_no[sunxi_hci->usbc_no];
	}else{
		sunxi_hci->irq_no = ehci_irq_no[sunxi_hci->usbc_no];
	}

	sprintf(sunxi_hci->hci_name, "%s%d", hci_name, sunxi_hci->usbc_no);

	sunxi_hci->usb_vbase	= (void __iomem	*)usbc_base[sunxi_hci->usbc_no];
	sunxi_hci->sram_vbase	= (void __iomem	*)SUNXI_SRAMCTRL_VBASE;
	sunxi_hci->clock_vbase	= (void __iomem	*)SUNXI_CCM_VBASE;
	sunxi_hci->gpio_vbase	= (void __iomem	*)SUNXI_PIO_VBASE;
	sunxi_hci->sdram_vbase	= (void __iomem	*)SUNXI_SDMMC1_VBASE;

	get_usb_cfg(sunxi_hci);
	request_usb_regulator_io(sunxi_hci);
	sunxi_hci->open_clock	= open_clock;
	sunxi_hci->close_clock	= close_clock;
	sunxi_hci->set_power	= sunxi_set_vbus;
	sunxi_hci->usb_passby	= usb_passby;
	sunxi_hci->port_configure = hci_port_configure;

#ifdef  CONFIG_USB_SUNXI_HSIC
	u32 reg_value = 0;
	reg_value = USBC_Readl(sunxi_hci->sram_vbase+ SUNXI_USB_PMU_IRQ_ENABLE);
	reg_value |= (1 << 1);
	reg_value |= (1 << 20);
	reg_value |= (1 << 17);
	USBC_Writel(reg_value, (sunxi_hci->sram_vbase+ SUNXI_USB_PMU_IRQ_ENABLE));
#endif

#ifndef CONFIG_ARCH_SUN9IW1
#ifdef  SUNXI_USB_FPGA
	fpga_config_use_hci((__u32 __force)sunxi_hci->sram_vbase);
#endif
#endif

	ret = clock_init(sunxi_hci, ohci);
	if(ret != 0){
		DMSG_PANIC("ERR: clock_init failed\n");
		goto failed1;
	}

	print_sunxi_hci(sunxi_hci);

	return 0;

failed1:
	return -1;
}