void do_mem_stage()
{
bool_t read = gen_mem_read();
word_t valm = 0;
mem_addr = gen_mem_addr();
mem_data = ex_mem_curr->vala;
mem_write = gen_mem_write();
mem_test = gen_mem_test();
dmem_error = FALSE;
if (read && !mem_test) {
dmem_error = dmem_error || !get_word_val(mem, mem_addr, &valm);
if (!dmem_error)
sim_log("\tMemory: Read 0x%x from 0x%x\n",
valm, mem_addr);
}
if (mem_write && !mem_test) {
word_t sink;
/* Do a read of address just to check validity */
dmem_error = dmem_error || !get_word_val(mem, mem_addr, &sink);
if (dmem_error)
sim_log("\tMemory: Invalid address 0x%x\n",
mem_addr);
}
if (mem_test && read){
mem_test_address = mem_addr;
int ans = test_memory(mem, mem_test_address);
valm = ans;
}
mem_wb_next->icode = ex_mem_curr->icode;
mem_wb_next->ifun = ex_mem_curr->ifun;
mem_wb_next->vale = ex_mem_curr->vale;
mem_wb_next->valm = valm;
mem_wb_next->deste = ex_mem_curr->deste;
mem_wb_next->destm = ex_mem_curr->destm;
mem_wb_next->status = gen_m_stat();
mem_wb_next->stage_pc = ex_mem_curr->stage_pc;
}
void do_mem_stage()
{
bool_t read = gen_mem_read();
word_t valm = 0;
mem_addr = gen_mem_addr();
if(ex_mem_curr->icode == I_MUTEXTEST || ex_mem_curr->icode == I_MUTEXCLEAR)
mem_addr = MUTEX_BYTE;
mem_data = ex_mem_curr->vala;
if(ex_mem_curr->icode == I_MUTEXTEST)
mem_data = 1;
else if(ex_mem_curr->icode == I_MUTEXCLEAR)
mem_data = 0;
mem_write = gen_mem_write();
dmem_error = FALSE;
if (read) {
dmem_error = dmem_error || !get_word_val(mem, mem_addr, &valm);
if (!dmem_error)
sim_log("\tMemory: Read 0x%x from 0x%x\n",
valm, mem_addr);
}
if (mem_write) {
word_t sink;
/* Do a read of address just to check validity */
dmem_error = dmem_error || !get_word_val(mem, mem_addr, &sink);
if (dmem_error)
sim_log("\tMemory: Invalid address 0x%x\n",
mem_addr);
}
mem_wb_next->icode = ex_mem_curr->icode;
mem_wb_next->ifun = ex_mem_curr->ifun;
mem_wb_next->vale = ex_mem_curr->vale;
mem_wb_next->valm = valm;
mem_wb_next->deste = ex_mem_curr->deste;
mem_wb_next->destm = ex_mem_curr->destm;
mem_wb_next->status = gen_m_stat();
mem_wb_next->stage_pc = ex_mem_curr->stage_pc;
}
