/* Get divider value */ STATIC uint8_t getClkDiv(LPC_ADC_T *pADC, bool burstMode, uint32_t adcRate, uint8_t clks) { uint32_t adcBlockFreq; uint32_t fullAdcRate; uint8_t div; /* The APB clock (PCLK_ADC0) is divided by (CLKDIV+1) to produce the clock for A/D converter, which should be less than or equal to 4.5MHz. A fully conversion requires (bits_accuracy+1) of these clocks. ADC Clock = PCLK_ADC0 / (CLKDIV + 1); ADC rate = ADC clock / (the number of clocks required for each conversion); */ #if defined(CHIP_LPC175X_6X) adcBlockFreq = Chip_Clock_GetPeripheralClockRate(SYSCTL_PCLK_ADC); #else adcBlockFreq = Chip_Clock_GetPeripheralClockRate(); #endif #if defined(ADC_ACC_12BITS) fullAdcRate = adcRate * getFullConvClk(); #else if (burstMode) { fullAdcRate = adcRate * clks; } else { fullAdcRate = adcRate * getFullConvClk(); } #endif /* Get the round value by fomular: (2*A + B)/(2*B) */ div = ((adcBlockFreq * 2 + fullAdcRate) / (fullAdcRate * 2)) - 1; return div; }
/* Get divider value */ STATIC uint8_t getClkDiv(LPC_ADC_T *pADC, bool burstMode, uint32_t adcRate, uint8_t clks) { uint32_t adcBlockFreq; uint32_t fullAdcRate; uint8_t div; /* The APB clock (PCLK_ADC0) is divided by (CLKDIV+1) to produce the clock for A/D converter, which should be less than or equal to 4.5MHz. A fully conversion requires (bits_accuracy+1) of these clocks. ADC Clock = PCLK_ADC0 / (CLKDIV + 1); ADC rate = ADC clock / (the number of clocks required for each conversion); */ adcBlockFreq = Chip_Clock_GetRate(Chip_ADC_GetClockIndex(pADC)); if (burstMode) { fullAdcRate = adcRate * clks; } else { fullAdcRate = adcRate * getFullConvClk(); } /* Get the round value by fomular: (2*A + B)/(2*B) */ div = ((adcBlockFreq * 2 + fullAdcRate) / (fullAdcRate * 2)) - 1; return div; }