C++ (Cpp) get_board_sys_clk示例

示例#1

文件： fsl_8xxx_clk.c 项目： 12thmantec/u-boot-novena-spl

/*
 * Return DDR input clock - synchronous with SYSCLK or 66 MHz
 * Note: 86xx doesn't support asynchronous DDR clk
 */
unsigned long get_board_ddr_clk(ulong dummy)
{
	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
	u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9;

	if (ddr_ratio == 0x7)
		return get_board_sys_clk(dummy);

	return 66666666;
}

示例#2

文件： ls1046aqds.c 项目： eballetbo/u-boot

unsigned long get_board_ddr_clk(void)
{
	u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);

	if (if_board_diff_clk())
		return get_board_sys_clk();
	switch ((ddrclk_conf & 0x30) >> 4) {
	case QIXIS_DDRCLK_100:
		return 100000000;
	case QIXIS_DDRCLK_125:
		return 125000000;
	case QIXIS_DDRCLK_133:
		return 133333333;
	}

	return 66666666;
}

示例#3

文件： fsl_8xxx_clk.c 项目： 54shady/uboot_tiny4412

/*
 * Return DDR input clock - synchronous with SYSCLK or 66 MHz
 * Note: 86xx doesn't support asynchronous DDR clk
 */
unsigned long get_board_ddr_clk(ulong dummy)
{
	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
	u32 ddr_ratio = (in_be32(&gur->porpllsr) & 0x00003e00) >> 9;

	if (ddr_ratio == 0x7)
		return get_board_sys_clk(dummy);

#ifdef CONFIG_P2020
	if (in_be32(&gur->gpporcr) & 0x20000)
		return 66666666;
	else
		return 100000000;
#else
	return 66666666;
#endif
}