static u32 gem_mdc_clk_div(int id, struct macb_device *macb)
{
u32 config;
#if defined(CONFIG_DM_ETH) && defined(CONFIG_CLK)
unsigned long macb_hz = macb->pclk_rate;
#else
unsigned long macb_hz = get_macb_pclk_rate(id);
#endif
if (macb_hz < 20000000)
config = GEM_BF(CLK, GEM_CLK_DIV8);
else if (macb_hz < 40000000)
config = GEM_BF(CLK, GEM_CLK_DIV16);
else if (macb_hz < 80000000)
config = GEM_BF(CLK, GEM_CLK_DIV32);
else if (macb_hz < 120000000)
config = GEM_BF(CLK, GEM_CLK_DIV48);
else if (macb_hz < 160000000)
config = GEM_BF(CLK, GEM_CLK_DIV64);
else
config = GEM_BF(CLK, GEM_CLK_DIV96);
return config;
}
int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
{
struct macb_device *macb;
struct eth_device *netdev;
unsigned long macb_hz;
u32 ncfgr;
macb = malloc(sizeof(struct macb_device));
if (!macb) {
printf("Error: Failed to allocate memory for MACB%d\n", id);
return -1;
}
memset(macb, 0, sizeof(struct macb_device));
netdev = &macb->netdev;
macb->rx_buffer = dma_alloc_coherent(CONFIG_SYS_MACB_RX_BUFFER_SIZE,
&macb->rx_buffer_dma);
macb->rx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_RX_RING_SIZE
* sizeof(struct macb_dma_desc),
&macb->rx_ring_dma);
macb->tx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_TX_RING_SIZE
* sizeof(struct macb_dma_desc),
&macb->tx_ring_dma);
macb->regs = regs;
macb->phy_addr = phy_addr;
sprintf(netdev->name, "macb%d", id);
netdev->init = macb_init;
netdev->halt = macb_halt;
netdev->send = macb_send;
netdev->recv = macb_recv;
netdev->write_hwaddr = macb_write_hwaddr;
/*
* Do some basic initialization so that we at least can talk
* to the PHY
*/
macb_hz = get_macb_pclk_rate(id);
if (macb_hz < 20000000)
ncfgr = MACB_BF(CLK, MACB_CLK_DIV8);
else if (macb_hz < 40000000)
ncfgr = MACB_BF(CLK, MACB_CLK_DIV16);
else if (macb_hz < 80000000)
ncfgr = MACB_BF(CLK, MACB_CLK_DIV32);
else
ncfgr = MACB_BF(CLK, MACB_CLK_DIV64);
macb_writel(macb, NCFGR, ncfgr);
eth_register(netdev);
#if defined(CONFIG_CMD_MII)
miiphy_register(netdev->name, macb_miiphy_read, macb_miiphy_write);
#endif
return 0;
}
static u32 macb_mdc_clk_div(int id, struct macb_device *macb)
{
u32 config;
unsigned long macb_hz = get_macb_pclk_rate(id);
if (macb_hz < 20000000)
config = MACB_BF(CLK, MACB_CLK_DIV8);
else if (macb_hz < 40000000)
config = MACB_BF(CLK, MACB_CLK_DIV16);
else if (macb_hz < 80000000)
config = MACB_BF(CLK, MACB_CLK_DIV32);
else
config = MACB_BF(CLK, MACB_CLK_DIV64);
return config;
}
static u32 macb_mdc_clk_div(int id, struct macb_device *macb)
{
u32 config;
#ifdef CONFIG_DM_ETH
unsigned long macb_hz = macb->pclk_rate;
#else
unsigned long macb_hz = get_macb_pclk_rate(id);
#endif
if (macb_hz < 20000000)
config = MACB_BF(CLK, MACB_CLK_DIV8);
else if (macb_hz < 40000000)
config = MACB_BF(CLK, MACB_CLK_DIV16);
else if (macb_hz < 80000000)
config = MACB_BF(CLK, MACB_CLK_DIV32);
else
config = MACB_BF(CLK, MACB_CLK_DIV64);
return config;
}
static int macb_probe(struct device_d *dev)
{
struct eth_device *edev;
struct macb_device *macb;
unsigned long macb_hz;
u32 ncfgr;
struct at91_ether_platform_data *pdata;
#if defined(CONFIG_ARCH_AT91)
struct clk *pclk;
#endif
if (!dev->platform_data) {
printf("macb: no platform_data\n");
return -ENODEV;
}
pdata = dev->platform_data;
edev = xzalloc(sizeof(struct eth_device) + sizeof(struct macb_device));
dev->type_data = edev;
edev->priv = (struct macb_device *)(edev + 1);
macb = edev->priv;
edev->init = macb_init;
edev->open = macb_open;
edev->send = macb_send;
edev->recv = macb_recv;
edev->halt = macb_halt;
edev->get_ethaddr = macb_get_ethaddr;
edev->set_ethaddr = macb_set_ethaddr;
macb->miidev.read = macb_phy_read;
macb->miidev.write = macb_phy_write;
macb->miidev.address = pdata->phy_addr;
macb->miidev.flags = pdata->flags & AT91SAM_ETHER_FORCE_LINK ?
MIIDEV_FORCE_LINK : 0;
macb->miidev.edev = edev;
macb->flags = pdata->flags;
macb->rx_buffer = xmalloc(CFG_MACB_RX_BUFFER_SIZE);
macb->rx_ring = xmalloc(CFG_MACB_RX_RING_SIZE * sizeof(struct macb_dma_desc));
macb->tx_ring = xmalloc(sizeof(struct macb_dma_desc));
macb->regs = (void *)dev->map_base;
/*
* Do some basic initialization so that we at least can talk
* to the PHY
*/
#if defined(CONFIG_ARCH_AT91)
pclk = clk_get(dev, "macb_clk");
clk_enable(pclk);
macb_hz = clk_get_rate(pclk);
#else
macb_hz = get_macb_pclk_rate(0);
#endif
if (macb_hz < 20000000)
ncfgr = MACB_BF(CLK, MACB_CLK_DIV8);
else if (macb_hz < 40000000)
ncfgr = MACB_BF(CLK, MACB_CLK_DIV16);
else if (macb_hz < 80000000)
ncfgr = MACB_BF(CLK, MACB_CLK_DIV32);
else
ncfgr = MACB_BF(CLK, MACB_CLK_DIV64);
writel(ncfgr, macb->regs + MACB_NCFGR);
mii_register(&macb->miidev);
eth_register(edev);
return 0;
}
