static void cal_md_settings(int md_id)
{
unsigned int tmp;
unsigned int md_en = 0;
char tmp_buf[30];
char* node_name = NULL;
struct device_node *node=NULL;
snprintf(tmp_buf,sizeof(tmp_buf),"MTK_ENABLE_MD%d",(md_id+1));
// MTK_ENABLE_MD*
if(ccci_get_fo_setting(tmp_buf, &tmp) == 0) {
if(tmp > 0)
md_en = 1;
}
if(!(md_en && (md_usage_case&(1<<md_id)))){
CCCI_UTIL_INF_MSG_WITH_ID(md_id,"md%d is disabled\n",(md_id+1));
return;
}
// MTK_MD*_SUPPORT
snprintf(tmp_buf,sizeof(tmp_buf),"MTK_MD%d_SUPPORT",(md_id+1));
if(ccci_get_fo_setting(tmp_buf, &tmp) == 0) {
md_support[md_id] = tmp;
}
// MD*_SMEM_SIZE
if(md_id==MD_SYS1){
node_name = "mediatek,MDCLDMA";
}else if(md_id==MD_SYS2){
node_name= "mediatek,AP_CCIF1";
}else{
CCCI_UTIL_ERR_MSG_WITH_ID(md_id,"md%d id is not supported,need to check\n",(md_id+1));
md_usage_case &= ~(1<<md_id);
return;
}
node = of_find_compatible_node(NULL, NULL, node_name);
if(node){
of_property_read_u32(node, "md_smem_size", &md_resv_smem_size[md_id]);
}else{
CCCI_UTIL_ERR_MSG_WITH_ID(md_id,"md%d smem size is not set in device tree,need to check\n",(md_id+1));
md_usage_case &= ~(1<<md_id);
return;
}
// MD ROM start address should be 32M align as remap hardware limitation
md_resv_mem_addr[md_id] = md_resv_mem_list[md_id];
/*
* for legacy CCCI: make share memory start address to be 2MB align, as share
* memory size is 2MB - requested by MD MPU.
* for ECCCI: ROM+RAM size will be align to 1M, and share memory is 2K,
* 1M alignment is also 2K alignment.
*/
md_resv_mem_size[md_id]= round_up(modem_size_list[md_id] - md_resv_smem_size[md_id], get_md_smem_align(md_id));
md_resv_smem_addr[md_id] = md_resv_mem_list[md_id] + md_resv_mem_size[md_id];
CCCI_UTIL_INF_MSG_WITH_ID(md_id,"md%d modem_total_size=0x%x,md_size=0x%x, smem_size=0x%x\n",(md_id+1),modem_size_list[md_id],md_resv_mem_size[md_id],md_resv_smem_size[md_id]);
if ((md_usage_case&(1<<md_id)) && ((md_resv_mem_addr[md_id]&(CCCI_MEM_ALIGN - 1)) != 0))
CCCI_UTIL_ERR_MSG_WITH_ID(md_id,"md%d memory addr is not 32M align!!!\n",(md_id+1));
if ((md_usage_case&(1<<md_id)) && ((md_resv_smem_addr[md_id]&(CCCI_SMEM_ALIGN_MD1 - 1)) != 0))
CCCI_UTIL_ERR_MSG_WITH_ID(md_id,"md%d share memory addr %pa is not 0x%x align!!\n", (md_id+1),&md_resv_smem_addr[md_id], CCCI_SMEM_ALIGN_MD1);
CCCI_UTIL_INF_MSG_WITH_ID(md_id,"MemStart: 0x%pa, MemSize:0x%08X\n",&md_resv_mem_addr[md_id], md_resv_mem_size[md_id]);
CCCI_UTIL_INF_MSG_WITH_ID(md_id,"SMemStart: 0x%pa, SMemSize:0x%08X\n",&md_resv_smem_addr[md_id], md_resv_smem_size[md_id]);
}
static void collect_md_settings(void)
{
unsigned int tmp;
unsigned int md1_en = 0;
unsigned int md2_en = 0;
unsigned int md3_en = 0;
unsigned int md5_en = 0;
md_usage_case = 0;
printk("[ccci] collect_md_settings\n");
// MTK_ENABLE_MD*
if(ccci_get_fo_setting("MTK_ENABLE_MD1", &tmp) == 0) {
if(tmp > 0)
md1_en = 1;
}
if(ccci_get_fo_setting("MTK_ENABLE_MD2", &tmp) == 0) {
if(tmp > 0)
md2_en = 1;
}
if(ccci_get_fo_setting("MTK_ENABLE_MD3", &tmp) == 0) {
if(tmp > 0)
md3_en = 1;
}
if(ccci_get_fo_setting("MTK_ENABLE_MD5", &tmp) == 0) {
if(tmp > 0)
md5_en = 1;
}
// MTK_MD*_SUPPORT
if(ccci_get_fo_setting("MTK_MD1_SUPPORT", &tmp) == 0) {
md_support[MD_SYS1] = tmp;
}
if(ccci_get_fo_setting("MTK_MD2_SUPPORT", &tmp) == 0) {
md_support[MD_SYS2] = tmp;
}
if(ccci_get_fo_setting("MTK_MD3_SUPPORT", &tmp) == 0) {
md_support[MD_SYS3] = tmp;
}
if(ccci_get_fo_setting("MTK_MD5_SUPPORT", &tmp) == 0) {
md_support[MD_SYS5] = tmp;
}
// MD*_SIZE
/*
* for legacy CCCI: make share memory start address to be 2MB align, as share
* memory size is 2MB - requested by MD MPU.
* for ECCCI: ROM+RAM size will be align to 1M, and share memory is 2K,
* 1M alignment is also 2K alignment.
*/
if(ccci_get_fo_setting("MD1_SIZE", &tmp) == 0) {
tmp = round_up(tmp, get_md_smem_align(MD_SYS1));
md_resv_mem_size[MD_SYS1] = tmp;
}
if(ccci_get_fo_setting("MD2_SIZE", &tmp) == 0) {
tmp = round_up(tmp, get_md_smem_align(MD_SYS2));
md_resv_mem_size[MD_SYS2] = tmp;
}
if(ccci_get_fo_setting("MD3_SIZE", &tmp) == 0) {
tmp = round_up(tmp, get_md_smem_align(MD_SYS3));
md_resv_mem_size[MD_SYS3] = tmp;
}
// MD*_SMEM_SIZE
#if 0
if(ccci_get_fo_setting("MD1_SMEM_SIZE", &tmp) == 0) {
md_resv_smem_size[MD_SYS1] = tmp;
}
#else
md_resv_smem_size[MD_SYS1] = 2*1024*1024;
#endif
#if 0
if(ccci_get_fo_setting("MD2_SMEM_SIZE", &tmp) == 0) {
md_resv_smem_size[MD_SYS2] = tmp;
}
#else
md_resv_smem_size[MD_SYS2] = 4*1024*1024;
#endif
if(ccci_get_fo_setting("MD3_SMEM_SIZE", &tmp) == 0) {
md_resv_smem_size[MD_SYS3] = tmp;
}
// Setting conflict checking
if(md1_en && (md_resv_smem_size[MD_SYS1]>0) && (md_resv_mem_size[MD_SYS1]>0)) {
// Setting is OK
} else if (md1_en && ((md_resv_smem_size[MD_SYS1]<=0) || (md_resv_mem_size[MD_SYS1]<=0))) {
CCCI_UTIL_ERR_MSG_WITH_ID(MD_SYS1,"FO Setting for md1 wrong: <%d:0x%08X:0x%08X>\n",
md1_en, md_resv_mem_size[MD_SYS1], md_resv_smem_size[MD_SYS1]);
md1_en = 0;
md_resv_smem_size[MD_SYS1] = 0;
md_resv_mem_size[MD_SYS1] = 0;
}
if(md2_en && (md_resv_smem_size[MD_SYS2]>0) && (md_resv_mem_size[MD_SYS2]>0)) {
// Setting is OK
} else if (md2_en && ((md_resv_smem_size[MD_SYS2]<=0) || (md_resv_mem_size[MD_SYS2]<=0))) {
CCCI_UTIL_ERR_MSG_WITH_ID(MD_SYS2,"FO Setting for md2 wrong: <%d:0x%08X:0x%08X>\n",
md2_en, md_resv_mem_size[MD_SYS2], md_resv_smem_size[MD_SYS2]);
md2_en = 0;
md_resv_smem_size[MD_SYS2] = 0;
md_resv_mem_size[MD_SYS2] = 0;
}
if(md3_en && (md_resv_smem_size[MD_SYS3]>0) && (md_resv_mem_size[MD_SYS3]>0)) {
// Setting is OK
} else if (md3_en && ((md_resv_smem_size[MD_SYS3]<=0) || (md_resv_mem_size[MD_SYS3]<=0))) {
CCCI_UTIL_ERR_MSG_WITH_ID(MD_SYS3,"FO Setting for md3 wrong: <%d:0x%08X:0x%08X>\n",
md3_en, md_resv_mem_size[MD_SYS3], md_resv_smem_size[MD_SYS3]);
md3_en = 0;
md_resv_smem_size[MD_SYS2] = 0;
md_resv_mem_size[MD_SYS2] = 0;
}
if(md1_en) {
md_usage_case |= MD1_EN;
modem_num++;
}
if(md2_en) {
md_usage_case |= MD2_EN;
modem_num++;
}
if(md3_en) {
md_usage_case |= MD3_EN;
modem_num++;
}
if(md5_en) {
md_usage_case |= MD5_EN;
modem_num++;
}
memory_layout_cal(MEM_LAY_OUT_VER);
}
