static int mtk_mdm_enable(void)
{
#if MTK_TS_PA_THPUT_VIA_CCCI == 1
    // Register the data send back function 
    // MD will receive the data by cb
//#ifdef  CONFIG_MTK_ENABLE_MD1
    if (get_modem_is_enabled(0))
    {
        if(!(is_meta_mode() | is_advanced_meta_mode())){
            register_ccci_sys_call_back(0, ID_REG_TXPOWER_CB, MDM_CB(0));
        }
        register_ccci_sys_call_back(0, ID_REG_RFTEMP_CB, MDM_CB(2));	
        register_ccci_sys_call_back(0, ID_REG_RFTEMP_3G_CB, MDM_CB(4));
    }
//#endif
//#ifdef  CONFIG_MTK_ENABLE_MD2
    if (get_modem_is_enabled(1))
    {
        if(!(is_meta_mode() | is_advanced_meta_mode())){
            register_ccci_sys_call_back(1, ID_REG_TXPOWER_CB, MDM_CB(1));
        }
        register_ccci_sys_call_back(1, ID_REG_RFTEMP_CB, MDM_CB(3));
        register_ccci_sys_call_back(1, ID_REG_RFTEMP_3G_CB, MDM_CB(5));
    }
//#endif
    init_timer(&txpwr_timer);
    txpwr_timer.function = (void *)&mtk_stats_txpwr;
    //txpwr_timer.data = (unsigned long) &wmt_stats_info;
    txpwr_timer.expires = jiffies + signal_period * HZ;
    add_timer(&txpwr_timer);
#endif
    mtk_mdm_dprintk("ENABLE MDM_TxPower Function\n");
    return 0;
}
static int __init swtp_mod_init(void)
{
    int ret = 0;
    printk(KERN_ALERT "swtp_mod_init.\n");    

    swtp_mod_eint_init();

    if(get_modem_is_enabled(0)){
        ret = register_ccci_sys_call_back(0, MD_SW_MD1_TX_POWER_REQ, swtp_mode_update_handler);
        printk("[swtp register MD1 call back [%d]\n", ret);
    }

    if(get_modem_is_enabled(1)) {
        ret = register_ccci_sys_call_back(1, MD_SW_MD2_TX_POWER_REQ, swtp_mode_update_handler);
	    printk("[swtp register MD2call back [%d]\n", ret);
    }

    swtp_kthread = kthread_run(swtp_state_machine, 0, "swtp kthread");

    init_timer(&swtp_timer);
    swtp_timer.function = (void *)&swtp_mod_eint_read_timer;
    swtp_timer.data = SWTP_MAX_TIMER_CNT; // retry count

    printk(KERN_ALERT "[swtp_tr] running swtp thread\n");

    return 0;
}
int swtp_rfcable_tx_power(void)
{
    int ret1 = 0, ret2 = 0;

    if(get_modem_is_enabled(0))
    ret1 = switch_MD1_Tx_Power(swtp_state_reg[SWTP_CTRL_SUPER_SET].setvalue);
    
    if(get_modem_is_enabled(1))
    ret2 = switch_MD2_Tx_Power(swtp_state_reg[SWTP_CTRL_SUPER_SET].setvalue);

    return ((ret1 == 0) && (ret2 == 0));
}
static int swtp_set_tx_power(unsigned int mode)
{
    int ret1 = 0, ret2 = 0;

    if(get_modem_is_enabled(0))
    ret1 = switch_MD1_Tx_Power(mode);

    if(get_modem_is_enabled(1))    
    ret2 = switch_MD2_Tx_Power(mode);   

    return ((ret1 == 0) && (ret2 == 0));
}
int swtp_reset_tx_power(void)
{
    int ret1 = 0, ret2 = 0;

    if(get_modem_is_enabled(0))
    ret1 = switch_MD1_Tx_Power(SWTP_DEFAULT_MODE);
    
    if(get_modem_is_enabled(1))
    ret2 = switch_MD2_Tx_Power(SWTP_DEFAULT_MODE);

    return ((ret1 == 0) && (ret2 == 0));
}
示例#6
0
static int send_get_md_all_msg(void)
{

	char mode[1];

	if (!(is_meta_mode() | is_advanced_meta_mode())) {
		mode[0] = MTK_THERMAL_GET_TX_POWER;
/* #ifdef CONFIG_MTK_ENABLE_MD1 */
		if (get_modem_is_enabled(0))
			exec_ccci_kern_func_by_md_id(0, ID_GET_TXPOWER, mode, 0);
/* #endif */
/* #ifdef CONFIG_MTK_ENABLE_MD2 */
		if (get_modem_is_enabled(1))
			exec_ccci_kern_func_by_md_id(1, ID_GET_TXPOWER, mode, 0);
/* #endif */
	}
	mode[0] = MTK_THERMAL_GET_RF_TEMP_2G;
/* #ifdef CONFIG_MTK_ENABLE_MD1 */
	if (get_modem_is_enabled(0))
		exec_ccci_kern_func_by_md_id(0, ID_GET_TXPOWER, mode, 0);
/* #endif */
/* #ifdef CONFIG_MTK_ENABLE_MD2 */
	if (get_modem_is_enabled(1))
		exec_ccci_kern_func_by_md_id(1, ID_GET_TXPOWER, mode, 0);
/* #endif */
	mode[0] = MTK_THERMAL_GET_RF_TEMP_3G;
/* #ifdef CONFIG_MTK_ENABLE_MD1 */
	if (get_modem_is_enabled(0))
		exec_ccci_kern_func_by_md_id(0, ID_GET_TXPOWER, mode, 0);
/* #endif */
/* #ifdef CONFIG_MTK_ENABLE_MD2 */
	if (get_modem_is_enabled(1))
		exec_ccci_kern_func_by_md_id(1, ID_GET_TXPOWER, mode, 0);
/* #endif */

	return 0;
}
int md_ccif_get_modem_hw_info(struct platform_device *dev_ptr,
			      struct ccci_dev_cfg *dev_cfg,
			      struct md_hw_info *hw_info)
{
	struct device_node *node = NULL;

	memset(dev_cfg, 0, sizeof(struct ccci_dev_cfg));
	memset(hw_info, 0, sizeof(struct md_hw_info));

#ifdef CONFIG_OF
	if (dev_ptr->dev.of_node == NULL) {
		CCCI_ERR_MSG(dev_cfg->index, TAG, "modem OF node NULL\n");
		return -1;
	}

	of_property_read_u32(dev_ptr->dev.of_node, "cell-index",
			     &dev_cfg->index);
	CCCI_INF_MSG(dev_cfg->index, TAG, "modem hw info get idx:%d\n",
		     dev_cfg->index);
	if (!get_modem_is_enabled(dev_cfg->index)) {
		CCCI_ERR_MSG(dev_cfg->index, TAG, "modem %d not enable, exit\n",
			     dev_cfg->index + 1);
		return -1;
	}
#else
	struct ccci_dev_cfg *dev_cfg_ptr =
	    (struct ccci_dev_cfg *)dev->dev.platform_data;
	dev_cfg->index = dev_cfg_ptr->index;

	CCCI_INF_MSG(dev_cfg->index, TAG, "modem hw info get idx:%d\n",
		     dev_cfg->index);
	if (!get_modem_is_enabled(dev_cfg->index)) {
		CCCI_ERR_MSG(dev_cfg->index, TAG, "modem %d not enable, exit\n",
			     dev_cfg->index + 1);
		return -1;
	}
#endif

	switch (dev_cfg->index) {
	case 1:		/*MD_SYS2 */
#ifdef CONFIG_OF
		of_property_read_u32(dev_ptr->dev.of_node, "ccif,major",
				     &dev_cfg->major);
		of_property_read_u32(dev_ptr->dev.of_node, "ccif,minor_base",
				     &dev_cfg->minor_base);
		of_property_read_u32(dev_ptr->dev.of_node, "ccif,capability",
				     &dev_cfg->capability);

		hw_info->ap_ccif_base = of_iomap(dev_ptr->dev.of_node, 0);
		/*hw_info->md_ccif_base = hw_info->ap_ccif_base+0x1000; */
		node = of_find_compatible_node(NULL, NULL, "mediatek,MD_CCIF1");
		hw_info->md_ccif_base = of_iomap(node, 0);

		hw_info->ap_ccif_irq_id =
		    irq_of_parse_and_map(dev_ptr->dev.of_node, 0);
		hw_info->md_wdt_irq_id =
		    irq_of_parse_and_map(dev_ptr->dev.of_node, 1);

		/*Device tree using none flag to register irq, sensitivity has set at "irq_of_parse_and_map" */
		hw_info->ap_ccif_irq_flags = IRQF_TRIGGER_NONE;
		hw_info->md_wdt_irq_flags = IRQF_TRIGGER_NONE;
#endif

		hw_info->sram_size = CCIF_SRAM_SIZE;
		hw_info->md_rgu_base = MD2_RGU_BASE;
		hw_info->md_boot_slave_Vector = MD2_BOOT_VECTOR;
		hw_info->md_boot_slave_Key = MD2_BOOT_VECTOR_KEY;
		hw_info->md_boot_slave_En = MD2_BOOT_VECTOR_EN;

#if !defined(CONFIG_MTK_LEGACY)
		clk_scp_sys_md2_main =
		    devm_clk_get(&dev_ptr->dev, "scp-sys-md2-main");
		if (IS_ERR(clk_scp_sys_md2_main)) {
			CCCI_ERR_MSG(dev_cfg->index, TAG,
				     "modem %d get scp-sys-md2-main failed\n",
				     dev_cfg->index + 1);
			return -1;
		}
#endif
		break;
	case 2:		/*MD_SYS3 */
#ifdef CONFIG_OF
		of_property_read_u32(dev_ptr->dev.of_node, "ccif,major",
				     &dev_cfg->major);
		of_property_read_u32(dev_ptr->dev.of_node, "ccif,minor_base",
				     &dev_cfg->minor_base);
		of_property_read_u32(dev_ptr->dev.of_node, "ccif,capability",
				     &dev_cfg->capability);

		hw_info->ap_ccif_base = of_iomap(dev_ptr->dev.of_node, 0);
		/*hw_info->md_ccif_base = hw_info->ap_ccif_base+0x1000; */
		node = of_find_compatible_node(NULL, NULL, "mediatek,MD_CCIF1");
		hw_info->md_ccif_base = of_iomap(node, 0);

		hw_info->ap_ccif_irq_id =
		    irq_of_parse_and_map(dev_ptr->dev.of_node, 0);
		hw_info->md_wdt_irq_id =
		    irq_of_parse_and_map(dev_ptr->dev.of_node, 1);

		/*Device tree using none flag to register irq, sensitivity has set at "irq_of_parse_and_map" */
		hw_info->ap_ccif_irq_flags = IRQF_TRIGGER_NONE;
		hw_info->md_wdt_irq_flags = IRQF_TRIGGER_NONE;

		hw_info->md1_pccif_base =
		    (unsigned long)of_iomap(dev_ptr->dev.of_node, 1);
		hw_info->md3_pccif_base =
		    (unsigned long)of_iomap(dev_ptr->dev.of_node, 2);

		node =
		    of_find_compatible_node(NULL, NULL, "mediatek,INFRACFG_AO");
		hw_info->infra_ao_base = (unsigned long)of_iomap(node, 0);

		node = of_find_compatible_node(NULL, NULL, "mediatek,SLEEP");
		hw_info->sleep_base = (unsigned long)of_iomap(node, 0);

		node = of_find_compatible_node(NULL, NULL, "mediatek,TOPRGU");
		hw_info->toprgu_base = (unsigned long)of_iomap(node, 0);

		CCCI_INF_MSG(dev_cfg->index, TAG,
			     "infra_ao_base=0x%lx, sleep_base=0x%lx, toprgu_base=0x%lx\n",
			     hw_info->infra_ao_base, hw_info->sleep_base,
			     hw_info->toprgu_base);
#endif

		hw_info->sram_size = CCIF_SRAM_SIZE;
		hw_info->md_rgu_base = MD3_RGU_BASE;

#if !defined(CONFIG_MTK_LEGACY)
		clk_scp_sys_md3_main =
		    devm_clk_get(&dev_ptr->dev, "scp-sys-md2-main");
		if (IS_ERR(clk_scp_sys_md3_main)) {
			CCCI_ERR_MSG(dev_cfg->index, TAG,
				     "modem %d get scp-sys-md2-main failed\n",
				     dev_cfg->index + 1);
			return -1;
		}
#endif

		/*no boot slave for md3 */
		/*
		   hw_info->md_boot_slave_Vector = MD3_BOOT_VECTOR;
		   hw_info->md_boot_slave_Key = MD3_BOOT_VECTOR_KEY;
		   hw_info->md_boot_slave_En = MD3_BOOT_VECTOR_EN;
		 */
		break;
	default:
		return -1;
	}

	CCCI_INF_MSG(dev_cfg->index, TAG,
		     "modem ccif of node get dev_major:%d\n", dev_cfg->major);
	CCCI_INF_MSG(dev_cfg->index, TAG,
		     "modem ccif of node get minor_base:%d\n",
		     dev_cfg->minor_base);
	CCCI_INF_MSG(dev_cfg->index, TAG,
		     "modem ccif of node get capability:%d\n",
		     dev_cfg->capability);

	CCCI_INF_MSG(dev_cfg->index, TAG, "ap_ccif_base:0x%p\n",
		     (void *)hw_info->ap_ccif_base);
	CCCI_INF_MSG(dev_cfg->index, TAG, "ccif_irq_id:%d\n",
		     hw_info->ap_ccif_irq_id);
	CCCI_INF_MSG(dev_cfg->index, TAG, "md_wdt_irq_id:%d\n",
		     hw_info->md_wdt_irq_id);

	return 0;
}
static int __init ccci_init(void)
{
	int ret = CCCI_ERR_MODULE_INIT_OK;
	unsigned int md_num = 1;	
	int i = 0;
	int md_en[MAX_MD_NUM] = {0};
	
	//1. Get and set Support MD nmmber
	md_num = get_md_sys_max_num();
	set_md_sys_max_num(md_num);

	//2. Get and set MD enable table
	for(i = 0; i < md_num; i++) {
		if(get_modem_is_enabled(i)){
			md_en[i] = 1;
			set_md_enable(i, 1);
		} else {
			md_en[i] = 0;
			set_md_enable(i, 0);
		}
	}

#ifdef ENABLE_CCCI_DRV_BUILDIN
CCCI_MSG("ccci_init: device_initcall_sync\n");
#else  // MODULE
CCCI_MSG("ccci_init: module_init\n");
#endif

	//3. Init ccci device table	
    ret = init_ccci_dev_node();
	if(ret) {
		CCCI_MSG("init_ccci_dev_node fail: %d\n", ret);
		ret = -CCCI_ERR_INIT_DEV_NODE_FAIL;
		goto out;
	}

	//4. Init ccci driver for each modem
	for(i = 0; i < md_num; i++)
	{
		if(md_en[i] == 0) {
			CCCI_MSG_INF(i, "cci", "md initial fail: md%d is not enabled\n", i+1);
			continue;
		}
		
		// 4.0 Init platform support function
		ret = platform_init(i, !md_en[i]);
		if (ret) {
			CCCI_MSG_INF(i, "cci", "platform_init fail: %d\n", ret);
			ret = -CCCI_ERR_INIT_PLATFORM_FAIL;
			goto platform_out;
		} else {
			CCCI_DBG_MSG(i, "cci", "platform_init OK!\n");
		}

		// Make ccci device node
		ret = mk_ccci_dev_node(i);
		if (ret) {
			CCCI_MSG_INF(i, "cci", "mk_ccci_dev_node fail: %d\n", ret);
			ret = -CCCI_ERR_MK_DEV_NODE_FAIL;
			goto mk_node_out;
		} else {
			CCCI_DBG_MSG(i, "cci", "mk_ccci_dev_node OK!\n");
		}

		// Statistics init
		statistics_init(i);

		// 4.1 Init ccci logical layer
		ret = ccci_logic_layer_init(i);
		if(ret) {
			CCCI_MSG_INF(i, "cci", "ccci logical layer init fail: %d\n", ret);
			ret = -CCCI_ERR_INIT_LOGIC_LAYER_FAIL;
			goto logic_out;
		} else {
			CCCI_DBG_MSG(i, "cci", "ccci_logic_layer_init OK!\n");
		}
		
		// 4.2 Init md ctrl
		ret = ccci_md_ctrl_init(i);
		if(ret) {
			CCCI_MSG_INF(i, "cci", "ccci md ctrl init fail: %d\n", ret);
			ret = -CCCI_ERR_INIT_MD_CTRL_FAIL;
			goto mdctl_out;
		} else {
			CCCI_DBG_MSG(i, "cci", "ccci_md_ctrl_init OK!\n");
		}
		
		// 4.3 Init char dev
		ret = ccci_chrdev_init(i);
		if (ret) {
			CCCI_MSG_INF(i, "cci", "ccci_chrdev_init fail: %d\n", ret);
			ret = -CCCI_ERR_INIT_CHAR_DEV_FAIL;
			goto char_out;
		} else {
			CCCI_DBG_MSG(i, "cci", "ccci_chrdev_init OK!\n");
		}
		
		// 4.4 Init tty dev
		ret = ccci_tty_init(i);
		if (ret) {
			CCCI_MSG_INF(i, "cci", "ccci_tty_init fail: %d\n", ret);
			ret = -CCCI_ERR_INIT_TTY_FAIL;
			goto tty_out;
		} else {
			CCCI_DBG_MSG(i, "cci", "ccci_tty_init OK!\n");
		}
		
		// 4.5 Init ipc dev
		ret = ccci_ipc_init(i);
		if (ret) {
			CCCI_MSG_INF(i, "cci", "ccci_ipc_init fail: %d\n", ret);
			ret = -CCCI_ERR_INIT_IPC_FAIL;
			goto ipc_out;
		} else {
			CCCI_DBG_MSG(i, "cci", "ccci_ipc_init OK!\n");
		}
		
		// 4.6 Init rpc dev
		ret = ccci_rpc_init(i);
		if (ret) {
			CCCI_MSG_INF(i, "cci", "ccci_rpc_init fail: %d\n", ret);
			ret = -CCCI_ERR_INIT_RPC_FAIL;
			goto rpc_out;
		} else {
			CCCI_DBG_MSG(i, "cci", "ccci_rpc_init OK!\n");
		}
		
		// 4.7 Init fs dev
		ret = ccci_fs_init(i);
		if (ret) {
			CCCI_MSG_INF(i, "cci", "ccci_fs_init fail: %d\n", ret);
			ret = -CCCI_ERR_INIT_FS_FAIL;
			goto fs_out;
		} else {
			CCCI_DBG_MSG(i, "cci", "ccci_fs_init OK!\n");
		}
		
		// 4.8 Init ccmni dev
		ret = ccmni_init(i);
		if (ret) {
			CCCI_MSG_INF(i, "cci", "ccmni_init fail: %d\n", ret);
			ret = -CCCI_ERR_INIT_CCMNI_FAIL;
			goto ccmni_out;
		} else {
			CCCI_DBG_MSG(i, "cci", "ccmni_init OK!\n");
		}
		
		// 4.9 Init pmic dev
		// ....
		
		// 4.10 Init vir char dev
		ret = ccci_vir_chrdev_init(i);
		if (ret) {
			CCCI_MSG_INF(i, "cci", "ccci_vir_chrdev_init fail: %d\n", ret);		
			ret = -CCCI_ERR_INIT_VIR_CHAR_FAIL;
			goto virchar_out;
		} else {
			CCCI_DBG_MSG(i, "cci", "ccci_vir_chrdev_init OK!\n");
		}
		
		CCCI_MSG_INF(i, "cci", "md initial OK!\n");
	}

	// 5. Init common section
	ret = ccci_md_ctrl_common_init();
	if (ret == 0)
		goto out;
	else {
		i = md_num-1;
		CCCI_MSG_INF(i, "cci", "ccci_md_ctrl_common_init fail: %d\n", ret);
	}

virchar_out:
	ccci_vir_chrdev_exit(i);
	
ccmni_out:
	ccmni_exit(i);

fs_out:
	ccci_fs_exit(i);
	
rpc_out:
	ccci_rpc_exit(i);

ipc_out:
	ccci_ipc_exit(i);
	
tty_out:
	ccci_tty_exit(i);
	
char_out:
	ccci_chrdev_exit(i);

mdctl_out:
	ccci_md_ctrl_exit(i);
	
logic_out:
	ccci_logic_layer_exit(i);
	
platform_out:
	platform_deinit(i);
	
mk_node_out:
	ccci_dev_node_exit(i);
	
out:
	if ((i == MD_SYS2) && (md_num > MD_SYS2)) {
		ccci_vir_chrdev_exit(MD_SYS1);
		ccmni_exit(MD_SYS1);
		ccci_fs_exit(MD_SYS1);
		ccci_rpc_exit(MD_SYS1);
		ccci_ipc_exit(MD_SYS1);
		ccci_tty_exit(MD_SYS1);
		ccci_chrdev_exit(MD_SYS1);
		ccci_md_ctrl_exit(MD_SYS1);
		ccci_logic_layer_exit(MD_SYS1);
		platform_deinit(MD_SYS1);
		ccci_dev_node_exit(MD_SYS1);
	}
	
	if (ret == CCCI_ERR_MODULE_INIT_OK)
		CCCI_MSG("ccci module init OK\n");
	else {		
		release_ccci_dev_node();
		ccci_helper_exit();
		CCCI_MSG("ccci module init fail: %d\n", ret);
	}
	
	return ret;
}
示例#9
0
int md_ccif_get_modem_hw_info(struct platform_device *dev_ptr, struct ccci_dev_cfg *dev_cfg, struct md_hw_info *hw_info)
{
    struct device_node *node=NULL;
    memset(dev_cfg, 0, sizeof(struct ccci_dev_cfg));
    memset(hw_info, 0, sizeof(struct md_hw_info));

    #ifdef CONFIG_OF
    if(dev_ptr->dev.of_node == NULL) {
        CCCI_ERR_MSG(dev_cfg->index, TAG, "modem OF node NULL\n");
        return -1;
    }

    of_property_read_u32(dev_ptr->dev.of_node, "cell-index", &dev_cfg->index);
    CCCI_INF_MSG(dev_cfg->index, TAG, "modem hw info get idx:%d\n", dev_cfg->index);
    if(!get_modem_is_enabled(dev_cfg->index)) {
        CCCI_ERR_MSG(dev_cfg->index, TAG, "modem %d not enable, exit\n", dev_cfg->index + 1);
        return -1;
    }
    #else
    struct ccci_dev_cfg* dev_cfg_ptr = (struct ccci_dev_cfg*)dev->dev.platform_data;
    dev_cfg->index = dev_cfg_ptr->index;

    CCCI_INF_MSG(dev_cfg->index, TAG, "modem hw info get idx:%d\n", dev_cfg->index);
    if(!get_modem_is_enabled(dev_cfg->index)) {
        CCCI_ERR_MSG(dev_cfg->index, TAG, "modem %d not enable, exit\n", dev_cfg->index + 1);
        return -1;
    }
    #endif

    switch(dev_cfg->index) {
    case 1: //MD_SYS2
        #ifdef CONFIG_OF
        of_property_read_u32(dev_ptr->dev.of_node, "ccif,major", &dev_cfg->major);
        of_property_read_u32(dev_ptr->dev.of_node, "ccif,minor_base", &dev_cfg->minor_base);
        of_property_read_u32(dev_ptr->dev.of_node, "ccif,capability", &dev_cfg->capability);

        hw_info->ap_ccif_base = of_iomap(dev_ptr->dev.of_node, 0);
        //hw_info->md_ccif_base = hw_info->ap_ccif_base+0x1000;
        node = of_find_compatible_node(NULL, NULL, "mediatek,MD_CCIF1");
        hw_info->md_ccif_base = of_iomap(node, 0);

        hw_info->ap_ccif_irq_id = irq_of_parse_and_map(dev_ptr->dev.of_node, 0);
        hw_info->md_wdt_irq_id = irq_of_parse_and_map(dev_ptr->dev.of_node, 1);

        // Device tree using none flag to register irq, sensitivity has set at "irq_of_parse_and_map"
        hw_info->ap_ccif_irq_flags = IRQF_TRIGGER_NONE;
        hw_info->md_wdt_irq_flags = IRQF_TRIGGER_NONE;
        #endif

        hw_info->sram_size = CCIF_SRAM_SIZE;
        hw_info->md_rgu_base = MD2_RGU_BASE;
        hw_info->md_boot_slave_Vector = MD2_BOOT_VECTOR;
        hw_info->md_boot_slave_Key = MD2_BOOT_VECTOR_KEY;
        hw_info->md_boot_slave_En = MD2_BOOT_VECTOR_EN;
        
        break;
    default:
        return -1;
    }

    CCCI_INF_MSG(dev_cfg->index, TAG, "modem ccif of node get dev_major:%d\n", dev_cfg->major);
    CCCI_INF_MSG(dev_cfg->index, TAG, "modem ccif of node get minor_base:%d\n", dev_cfg->minor_base);
    CCCI_INF_MSG(dev_cfg->index, TAG, "modem ccif of node get capability:%d\n", dev_cfg->capability);

    CCCI_INF_MSG(dev_cfg->index, TAG, "ap_ccif_base:0x%p\n",(void*) hw_info->ap_ccif_base);
    CCCI_INF_MSG(dev_cfg->index, TAG, "ccif_irq_id:%d\n", hw_info->ap_ccif_irq_id);
    CCCI_INF_MSG(dev_cfg->index, TAG, "md_wdt_irq_id:%d\n", hw_info->md_wdt_irq_id);

    return 0;
}
int md_cd_get_modem_hw_info(struct platform_device *dev_ptr, struct ccci_dev_cfg *dev_cfg, struct md_hw_info *hw_info)
{
    struct device_node *node=NULL;
    memset(dev_cfg, 0, sizeof(struct ccci_dev_cfg));
    memset(hw_info, 0, sizeof(struct md_hw_info));

    if(dev_ptr->dev.of_node == NULL) {
        CCCI_ERR_MSG(dev_cfg->index, TAG, "modem OF node NULL\n");
        return -1;
    }

    of_property_read_u32(dev_ptr->dev.of_node, "cell-index", &dev_cfg->index);
    CCCI_INF_MSG(dev_cfg->index, TAG, "modem hw info get idx:%d\n", dev_cfg->index);
    if(!get_modem_is_enabled(dev_cfg->index)) {
        CCCI_ERR_MSG(dev_cfg->index, TAG, "modem %d not enable, exit\n", dev_cfg->index + 1);
        return -1;
    }

    switch(dev_cfg->index) {
    case 0: //MD_SYS1
        of_property_read_u32(dev_ptr->dev.of_node, "cldma,major", &dev_cfg->major);
        of_property_read_u32(dev_ptr->dev.of_node, "cldma,minor_base", &dev_cfg->minor_base);
        of_property_read_u32(dev_ptr->dev.of_node, "cldma,capability", &dev_cfg->capability);

        hw_info->cldma_ap_ao_base = of_iomap(dev_ptr->dev.of_node, 0);
        hw_info->cldma_md_ao_base = of_iomap(dev_ptr->dev.of_node, 1);
        hw_info->cldma_ap_pdn_base = of_iomap(dev_ptr->dev.of_node, 2);
        hw_info->cldma_md_pdn_base = of_iomap(dev_ptr->dev.of_node, 3);
        hw_info->ap_ccif_base = of_iomap(dev_ptr->dev.of_node, 4);        
        hw_info->md_ccif_base = of_iomap(dev_ptr->dev.of_node, 5);
        hw_info->cldma_irq_id = irq_of_parse_and_map(dev_ptr->dev.of_node, 0);
        hw_info->ap_ccif_irq_id = irq_of_parse_and_map(dev_ptr->dev.of_node, 1);
        hw_info->md_wdt_irq_id = irq_of_parse_and_map(dev_ptr->dev.of_node, 2);

        // Device tree using none flag to register irq, sensitivity has set at "irq_of_parse_and_map"
        hw_info->cldma_irq_flags = IRQF_TRIGGER_NONE;
        hw_info->ap_ccif_irq_flags = IRQF_TRIGGER_NONE;
        hw_info->md_wdt_irq_flags = IRQF_TRIGGER_NONE;
        hw_info->ap2md_bus_timeout_irq_flags = IRQF_TRIGGER_NONE;

        hw_info->sram_size = CCIF_SRAM_SIZE;
        hw_info->md_rgu_base = MD_RGU_BASE;
        hw_info->md_boot_slave_Vector = MD_BOOT_VECTOR;
        hw_info->md_boot_slave_Key = MD_BOOT_VECTOR_KEY;
        hw_info->md_boot_slave_En = MD_BOOT_VECTOR_EN;
#if !defined(CONFIG_MTK_LEGACY)
        clk_scp_sys_md1_main = devm_clk_get(&dev_ptr->dev,"scp-sys-md1-main");
        if(IS_ERR(clk_scp_sys_md1_main)){
            CCCI_ERR_MSG(dev_cfg->index, TAG, "modem %d get scp-sys-md1-main failed\n", dev_cfg->index + 1);
            return -1;
        }
#endif
        break;
    default:
        return -1;
    }

    CCCI_INF_MSG(dev_cfg->index, TAG, "modem cldma of node get dev_major:%d\n", dev_cfg->major);
    CCCI_INF_MSG(dev_cfg->index, TAG, "modem cldma of node get minor_base:%d\n", dev_cfg->minor_base);
    CCCI_INF_MSG(dev_cfg->index, TAG, "modem cldma of node get capability:%d\n", dev_cfg->capability);
    CCCI_INF_MSG(dev_cfg->index, TAG, "ap_cldma: ao_base=0x%p, pdn_base=0x%p\n", (void*)hw_info->cldma_ap_ao_base,(void*)hw_info->cldma_ap_pdn_base);
    CCCI_INF_MSG(dev_cfg->index, TAG, "md_cldma: ao_base=0x%p, pdn_base=0x%p\n",(void*) hw_info->cldma_md_ao_base,(void*) hw_info->cldma_md_pdn_base);

    CCCI_INF_MSG(dev_cfg->index, TAG, "ap_ccif_base:0x%p, md_ccif_base:0x%p\n",(void*) hw_info->ap_ccif_base,(void*) hw_info->md_ccif_base);
    CCCI_INF_MSG(dev_cfg->index, TAG, "cldma_irq_id:%d\n", hw_info->cldma_irq_id);
    CCCI_INF_MSG(dev_cfg->index, TAG, "ccif_irq_id:%d\n", hw_info->ap_ccif_irq_id);
    CCCI_INF_MSG(dev_cfg->index, TAG, "md_wdt_irq_id:%d\n", hw_info->md_wdt_irq_id);

    return 0;
}